mtd: cfi_cmdset_0002: Micron M29EW bugfixes as per TN-13-07
Fix the following issues with Micron's (formerly Numonyx) M29EW NOR flash chips, as documented on TN-13-07: - Correcting Erase Suspend Hang Ups (page 20) - Resolving the Delay After Resume Issue (page 22) Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com> Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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@ -431,6 +431,68 @@ static void cfi_fixup_major_minor(struct cfi_private *cfi,
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}
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}
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static int is_m29ew(struct cfi_private *cfi)
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{
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if (cfi->mfr == CFI_MFR_INTEL &&
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((cfi->device_type == CFI_DEVICETYPE_X8 && (cfi->id & 0xff) == 0x7e) ||
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(cfi->device_type == CFI_DEVICETYPE_X16 && cfi->id == 0x227e)))
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return 1;
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return 0;
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}
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/*
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* From TN-13-07: Patching the Linux Kernel and U-Boot for M29 Flash, page 20:
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* Some revisions of the M29EW suffer from erase suspend hang ups. In
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* particular, it can occur when the sequence
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* Erase Confirm -> Suspend -> Program -> Resume
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* causes a lockup due to internal timing issues. The consequence is that the
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* erase cannot be resumed without inserting a dummy command after programming
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* and prior to resuming. [...] The work-around is to issue a dummy write cycle
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* that writes an F0 command code before the RESUME command.
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*/
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static void cfi_fixup_m29ew_erase_suspend(struct map_info *map,
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unsigned long adr)
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{
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struct cfi_private *cfi = map->fldrv_priv;
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/* before resume, insert a dummy 0xF0 cycle for Micron M29EW devices */
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if (is_m29ew(cfi))
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map_write(map, CMD(0xF0), adr);
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}
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/*
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* From TN-13-07: Patching the Linux Kernel and U-Boot for M29 Flash, page 22:
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*
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* Some revisions of the M29EW (for example, A1 and A2 step revisions)
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* are affected by a problem that could cause a hang up when an ERASE SUSPEND
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* command is issued after an ERASE RESUME operation without waiting for a
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* minimum delay. The result is that once the ERASE seems to be completed
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* (no bits are toggling), the contents of the Flash memory block on which
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* the erase was ongoing could be inconsistent with the expected values
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* (typically, the array value is stuck to the 0xC0, 0xC4, 0x80, or 0x84
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* values), causing a consequent failure of the ERASE operation.
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* The occurrence of this issue could be high, especially when file system
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* operations on the Flash are intensive. As a result, it is recommended
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* that a patch be applied. Intensive file system operations can cause many
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* calls to the garbage routine to free Flash space (also by erasing physical
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* Flash blocks) and as a result, many consecutive SUSPEND and RESUME
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* commands can occur. The problem disappears when a delay is inserted after
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* the RESUME command by using the udelay() function available in Linux.
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* The DELAY value must be tuned based on the customer's platform.
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* The maximum value that fixes the problem in all cases is 500us.
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* But, in our experience, a delay of 30 µs to 50 µs is sufficient
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* in most cases.
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* We have chosen 500µs because this latency is acceptable.
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*/
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static void cfi_fixup_m29ew_delay_after_resume(struct cfi_private *cfi)
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{
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/*
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* Resolving the Delay After Resume Issue see Micron TN-13-07
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* Worst case delay must be 500µs but 30-50µs should be ok as well
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*/
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if (is_m29ew(cfi))
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cfi_udelay(500);
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}
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struct mtd_info *cfi_cmdset_0002(struct map_info *map, int primary)
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{
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struct cfi_private *cfi = map->fldrv_priv;
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@ -776,7 +838,10 @@ static void put_chip(struct map_info *map, struct flchip *chip, unsigned long ad
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switch(chip->oldstate) {
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case FL_ERASING:
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cfi_fixup_m29ew_erase_suspend(map,
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chip->in_progress_block_addr);
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map_write(map, cfi->sector_erase_cmd, chip->in_progress_block_addr);
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cfi_fixup_m29ew_delay_after_resume(cfi);
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chip->oldstate = FL_READY;
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chip->state = FL_ERASING;
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break;
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@ -916,6 +981,8 @@ static void __xipram xip_udelay(struct map_info *map, struct flchip *chip,
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/* Disallow XIP again */
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local_irq_disable();
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/* Correct Erase Suspend Hangups for M29EW */
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cfi_fixup_m29ew_erase_suspend(map, adr);
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/* Resume the write or erase operation */
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map_write(map, cfi->sector_erase_cmd, adr);
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chip->state = oldstate;
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