powerpc/mmiowb: Hook up mmwiob() implementation to asm-generic code
In a bid to kill off explicit mmiowb() usage in driver code, hook up the asm-generic mmiowb() tracking code but provide a definition of arch_mmiowb_state() so that the tracking data can remain in the paca as it does at present This replaces the existing (flawed) implementation. Acked-by: Michael Ellerman <mpe@ellerman.id.au> Acked-by: Linus Torvalds <torvalds@linux-foundation.org> Signed-off-by: Will Deacon <will.deacon@arm.com>
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@ -132,6 +132,7 @@ config PPC
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select ARCH_HAS_FORTIFY_SOURCE
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select ARCH_HAS_FORTIFY_SOURCE
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select ARCH_HAS_GCOV_PROFILE_ALL
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select ARCH_HAS_GCOV_PROFILE_ALL
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select ARCH_HAS_KCOV
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select ARCH_HAS_KCOV
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select ARCH_HAS_MMIOWB if PPC64
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select ARCH_HAS_PHYS_TO_DMA
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select ARCH_HAS_PHYS_TO_DMA
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select ARCH_HAS_PMEM_API if PPC64
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select ARCH_HAS_PMEM_API if PPC64
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select ARCH_HAS_PTE_SPECIAL
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select ARCH_HAS_PTE_SPECIAL
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@ -7,7 +7,6 @@ generic-y += export.h
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generic-y += irq_regs.h
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generic-y += irq_regs.h
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generic-y += local64.h
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generic-y += local64.h
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generic-y += mcs_spinlock.h
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generic-y += mcs_spinlock.h
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generic-y += mmiowb.h
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generic-y += preempt.h
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generic-y += preempt.h
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generic-y += rwsem.h
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generic-y += rwsem.h
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generic-y += vtime.h
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generic-y += vtime.h
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@ -34,14 +34,11 @@ extern struct pci_dev *isa_bridge_pcidev;
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#include <asm/byteorder.h>
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#include <asm/byteorder.h>
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#include <asm/synch.h>
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#include <asm/synch.h>
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#include <asm/delay.h>
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#include <asm/delay.h>
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#include <asm/mmiowb.h>
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#include <asm/mmu.h>
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#include <asm/mmu.h>
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#include <asm/ppc_asm.h>
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#include <asm/ppc_asm.h>
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#include <asm/pgtable.h>
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#include <asm/pgtable.h>
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#ifdef CONFIG_PPC64
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#include <asm/paca.h>
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#endif
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#define SIO_CONFIG_RA 0x398
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#define SIO_CONFIG_RA 0x398
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#define SIO_CONFIG_RD 0x399
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#define SIO_CONFIG_RD 0x399
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@ -107,12 +104,6 @@ extern bool isa_io_special;
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*
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*
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*/
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*/
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#ifdef CONFIG_PPC64
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#define IO_SET_SYNC_FLAG() do { local_paca->io_sync = 1; } while(0)
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#else
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#define IO_SET_SYNC_FLAG()
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#endif
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#define DEF_MMIO_IN_X(name, size, insn) \
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#define DEF_MMIO_IN_X(name, size, insn) \
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static inline u##size name(const volatile u##size __iomem *addr) \
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static inline u##size name(const volatile u##size __iomem *addr) \
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{ \
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{ \
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@ -127,7 +118,7 @@ static inline void name(volatile u##size __iomem *addr, u##size val) \
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{ \
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{ \
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__asm__ __volatile__("sync;"#insn" %1,%y0" \
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__asm__ __volatile__("sync;"#insn" %1,%y0" \
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: "=Z" (*addr) : "r" (val) : "memory"); \
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: "=Z" (*addr) : "r" (val) : "memory"); \
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IO_SET_SYNC_FLAG(); \
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mmiowb_set_pending(); \
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}
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}
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#define DEF_MMIO_IN_D(name, size, insn) \
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#define DEF_MMIO_IN_D(name, size, insn) \
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@ -144,7 +135,7 @@ static inline void name(volatile u##size __iomem *addr, u##size val) \
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{ \
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{ \
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__asm__ __volatile__("sync;"#insn"%U0%X0 %1,%0" \
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__asm__ __volatile__("sync;"#insn"%U0%X0 %1,%0" \
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: "=m" (*addr) : "r" (val) : "memory"); \
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: "=m" (*addr) : "r" (val) : "memory"); \
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IO_SET_SYNC_FLAG(); \
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mmiowb_set_pending(); \
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}
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}
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DEF_MMIO_IN_D(in_8, 8, lbz);
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DEF_MMIO_IN_D(in_8, 8, lbz);
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@ -652,24 +643,6 @@ static inline void name at \
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#include <asm-generic/iomap.h>
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#include <asm-generic/iomap.h>
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#ifdef CONFIG_PPC32
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#define mmiowb()
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#else
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/*
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* Enforce synchronisation of stores vs. spin_unlock
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* (this does it explicitly, though our implementation of spin_unlock
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* does it implicitely too)
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*/
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static inline void mmiowb(void)
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{
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unsigned long tmp;
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__asm__ __volatile__("sync; li %0,0; stb %0,%1(13)"
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: "=&r" (tmp) : "i" (offsetof(struct paca_struct, io_sync))
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: "memory");
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}
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#endif /* !CONFIG_PPC32 */
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static inline void iosync(void)
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static inline void iosync(void)
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{
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{
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__asm__ __volatile__ ("sync" : : : "memory");
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__asm__ __volatile__ ("sync" : : : "memory");
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20
arch/powerpc/include/asm/mmiowb.h
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20
arch/powerpc/include/asm/mmiowb.h
Normal file
@ -0,0 +1,20 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_POWERPC_MMIOWB_H
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#define _ASM_POWERPC_MMIOWB_H
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#ifdef CONFIG_MMIOWB
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#include <linux/compiler.h>
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#include <asm/barrier.h>
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#include <asm/paca.h>
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#define arch_mmiowb_state() (&local_paca->mmiowb_state)
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#define mmiowb() mb()
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#else
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#define mmiowb() do { } while (0)
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#endif /* CONFIG_MMIOWB */
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#include <asm-generic/mmiowb.h>
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#endif /* _ASM_POWERPC_MMIOWB_H */
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@ -34,6 +34,8 @@
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#include <asm/cpuidle.h>
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#include <asm/cpuidle.h>
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#include <asm/atomic.h>
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#include <asm/atomic.h>
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#include <asm-generic/mmiowb_types.h>
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register struct paca_struct *local_paca asm("r13");
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register struct paca_struct *local_paca asm("r13");
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#if defined(CONFIG_DEBUG_PREEMPT) && defined(CONFIG_SMP)
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#if defined(CONFIG_DEBUG_PREEMPT) && defined(CONFIG_SMP)
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@ -171,7 +173,6 @@ struct paca_struct {
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u16 trap_save; /* Used when bad stack is encountered */
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u16 trap_save; /* Used when bad stack is encountered */
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u8 irq_soft_mask; /* mask for irq soft masking */
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u8 irq_soft_mask; /* mask for irq soft masking */
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u8 irq_happened; /* irq happened while soft-disabled */
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u8 irq_happened; /* irq happened while soft-disabled */
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u8 io_sync; /* writel() needs spin_unlock sync */
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u8 irq_work_pending; /* IRQ_WORK interrupt while soft-disable */
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u8 irq_work_pending; /* IRQ_WORK interrupt while soft-disable */
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u8 nap_state_lost; /* NV GPR values lost in power7_idle */
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u8 nap_state_lost; /* NV GPR values lost in power7_idle */
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#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
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#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
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@ -264,6 +265,9 @@ struct paca_struct {
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#ifdef CONFIG_STACKPROTECTOR
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#ifdef CONFIG_STACKPROTECTOR
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unsigned long canary;
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unsigned long canary;
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#endif
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#endif
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#ifdef CONFIG_MMIOWB
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struct mmiowb_state mmiowb_state;
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#endif
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} ____cacheline_aligned;
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} ____cacheline_aligned;
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extern void copy_mm_to_paca(struct mm_struct *mm);
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extern void copy_mm_to_paca(struct mm_struct *mm);
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@ -39,19 +39,6 @@
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#define LOCK_TOKEN 1
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#define LOCK_TOKEN 1
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#endif
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#endif
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#if defined(CONFIG_PPC64) && defined(CONFIG_SMP)
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#define CLEAR_IO_SYNC (get_paca()->io_sync = 0)
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#define SYNC_IO do { \
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if (unlikely(get_paca()->io_sync)) { \
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mb(); \
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get_paca()->io_sync = 0; \
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} \
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} while (0)
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#else
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#define CLEAR_IO_SYNC
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#define SYNC_IO
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#endif
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#ifdef CONFIG_PPC_PSERIES
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#ifdef CONFIG_PPC_PSERIES
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#define vcpu_is_preempted vcpu_is_preempted
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#define vcpu_is_preempted vcpu_is_preempted
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static inline bool vcpu_is_preempted(int cpu)
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static inline bool vcpu_is_preempted(int cpu)
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@ -99,7 +86,6 @@ static inline unsigned long __arch_spin_trylock(arch_spinlock_t *lock)
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static inline int arch_spin_trylock(arch_spinlock_t *lock)
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static inline int arch_spin_trylock(arch_spinlock_t *lock)
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{
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{
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CLEAR_IO_SYNC;
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return __arch_spin_trylock(lock) == 0;
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return __arch_spin_trylock(lock) == 0;
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}
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}
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@ -130,7 +116,6 @@ extern void __rw_yield(arch_rwlock_t *lock);
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static inline void arch_spin_lock(arch_spinlock_t *lock)
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static inline void arch_spin_lock(arch_spinlock_t *lock)
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{
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{
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CLEAR_IO_SYNC;
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while (1) {
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while (1) {
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if (likely(__arch_spin_trylock(lock) == 0))
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if (likely(__arch_spin_trylock(lock) == 0))
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break;
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break;
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@ -148,7 +133,6 @@ void arch_spin_lock_flags(arch_spinlock_t *lock, unsigned long flags)
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{
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{
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unsigned long flags_dis;
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unsigned long flags_dis;
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CLEAR_IO_SYNC;
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while (1) {
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while (1) {
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if (likely(__arch_spin_trylock(lock) == 0))
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if (likely(__arch_spin_trylock(lock) == 0))
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break;
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break;
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@ -167,7 +151,6 @@ void arch_spin_lock_flags(arch_spinlock_t *lock, unsigned long flags)
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static inline void arch_spin_unlock(arch_spinlock_t *lock)
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static inline void arch_spin_unlock(arch_spinlock_t *lock)
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{
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{
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SYNC_IO;
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__asm__ __volatile__("# arch_spin_unlock\n\t"
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__asm__ __volatile__("# arch_spin_unlock\n\t"
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PPC_RELEASE_BARRIER: : :"memory");
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PPC_RELEASE_BARRIER: : :"memory");
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lock->slock = 0;
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lock->slock = 0;
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@ -2429,7 +2429,10 @@ static void dump_one_paca(int cpu)
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DUMP(p, trap_save, "%#-*x");
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DUMP(p, trap_save, "%#-*x");
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DUMP(p, irq_soft_mask, "%#-*x");
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DUMP(p, irq_soft_mask, "%#-*x");
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DUMP(p, irq_happened, "%#-*x");
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DUMP(p, irq_happened, "%#-*x");
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DUMP(p, io_sync, "%#-*x");
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#ifdef CONFIG_MMIOWB
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DUMP(p, mmiowb_state.nesting_count, "%#-*x");
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DUMP(p, mmiowb_state.mmiowb_pending, "%#-*x");
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#endif
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DUMP(p, irq_work_pending, "%#-*x");
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DUMP(p, irq_work_pending, "%#-*x");
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DUMP(p, nap_state_lost, "%#-*x");
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DUMP(p, nap_state_lost, "%#-*x");
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DUMP(p, sprg_vdso, "%#-*llx");
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DUMP(p, sprg_vdso, "%#-*llx");
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