iv/linux
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

arm64: dts: qcom: sc7280-crd: Add device tree files for CRD

Browse Source 
CRD (Compute Reference Design) is a sc7280 based board, largely
derived from the existing IDP board design with some key deltas
1. has EC and H1 over SPI similar to IDP2
2. touchscreen and trackpad support
3. eDP display

We just add the barebones dts file here, subsequent patches will
add support for EC/H1 and other components.

Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Tested-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1638185497-26477-3-git-send-email-quic_rjendra@quicinc.com
This commit is contained in:
Rajendra Nayak 2021-11-29 17:01:35 +05:30 committed by Bjorn Andersson
parent 7a21328bb3
commit 427b249504
2 changed files with 32 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
arch/arm64/boot/dts/qcom/Makefile
View File

@ -84,6 +84,7 @@ dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-r1-lte.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7280-herobrine.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7280-idp.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7280-idp2.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7280-crd.dtb
dtb-$(CONFIG_ARCH_QCOM) += sdm630-sony-xperia-ganges-kirin.dtb
dtb-$(CONFIG_ARCH_QCOM) += sdm630-sony-xperia-nile-discovery.dtb
dtb-$(CONFIG_ARCH_QCOM) += sdm630-sony-xperia-nile-pioneer.dtb

31
arch/arm64/boot/dts/qcom/sc7280-crd.dts Normal file
View File

@ -0,0 +1,31 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* sc7280 CRD board device tree source
*
* Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
*/
/dts-v1/;
#include "sc7280-idp.dtsi"
/ {
model = "Qualcomm Technologies, Inc. sc7280 CRD platform";
compatible = "qcom,sc7280-crd", "google,hoglin", "qcom,sc7280";
aliases {
serial0 = &uart5;
};
chosen {
stdout-path = "serial0:115200n8";
};
};
&nvme_3v3_regulator {
gpio = <&tlmm 51 GPIO_ACTIVE_HIGH>;
};
&nvme_pwren {
pins = "gpio51";
};