arm: dts: marvell: clearfog-gtr-l8: add support for second sfp connector

Clearfog GTR L8 has an extra SFP connector on the managed switch port 9.
Add descriptions for both entities along with pinctrl.

Signed-off-by: Josua Mayer <josua@solid-run.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
This commit is contained in:
Josua Mayer 2024-02-27 17:23:11 +01:00 committed by Gregory CLEMENT
parent 0d390855f6
commit 429cc56b8d
2 changed files with 26 additions and 2 deletions

View File

@ -6,6 +6,16 @@
model = "SolidRun Clearfog GTR L8";
compatible = "solidrun,clearfog-gtr-l8", "marvell,armada385",
"marvell,armada380";
/* CON25 */
sfp1: sfp-1 {
compatible = "sff,sfp";
pinctrl-0 = <&cf_gtr_sfp1_pins>;
pinctrl-names = "default";
i2c-bus = <&i2c0>;
mod-def0-gpio = <&gpio0 24 GPIO_ACTIVE_LOW>;
tx-disable-gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>;
};
};
&mdio {
@ -68,11 +78,19 @@
phy-handle = <&switch0phy7>;
};
ethernet-port@9 {
reg = <9>;
label = "lan-sfp";
phy-mode = "sgmii";
sfp = <&sfp1>;
managed = "in-band-status";
};
ethernet-port@10 {
reg = <10>;
phy-mode = "2500base-x";
ethernet = <&eth1>;
fixed-link {
speed = <2500>;
full-duplex;

View File

@ -201,6 +201,12 @@
marvell,function = "gpio";
};
cf_gtr_sfp1_pins: sfp1-pins {
/* sfp modabs, txdisable */
marvell,pins = "mpp24", "mpp54";
marvell,function = "gpio";
};
cf_gtr_spi1_cs_pins: spi1-cs-pins {
marvell,pins = "mpp59";
marvell,function = "spi1";
@ -276,7 +282,7 @@
};
/* CON5 */
sfp0: sfp {
sfp0: sfp-0 {
compatible = "sff,sfp";
pinctrl-0 = <&cf_gtr_sfp0_pins>;
pinctrl-names = "default";