pinctrl: at91: add drive strength support for SAM9X60
Add drive strength support for SAM9X60 pin controller. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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@ -574,6 +574,17 @@ static unsigned at91_mux_sam9x5_get_drivestrength(void __iomem *pio,
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return tmp;
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}
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static unsigned at91_mux_sam9x60_get_drivestrength(void __iomem *pio,
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unsigned pin)
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{
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unsigned tmp = readl_relaxed(pio + SAM9X60_PIO_DRIVER1);
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if (tmp & BIT(pin))
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return DRIVE_STRENGTH_BIT_HI;
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return DRIVE_STRENGTH_BIT_LOW;
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}
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static void set_drive_strength(void __iomem *reg, unsigned pin, u32 strength)
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{
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unsigned tmp = readl_relaxed(reg);
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@ -611,6 +622,27 @@ static void at91_mux_sam9x5_set_drivestrength(void __iomem *pio, unsigned pin,
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setting);
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}
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static void at91_mux_sam9x60_set_drivestrength(void __iomem *pio, unsigned pin,
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u32 setting)
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{
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unsigned int tmp;
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if (setting <= DRIVE_STRENGTH_BIT_DEF ||
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setting == DRIVE_STRENGTH_BIT_MED ||
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setting > DRIVE_STRENGTH_BIT_HI)
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return;
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tmp = readl_relaxed(pio + SAM9X60_PIO_DRIVER1);
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/* Strength is 0: low, 1: hi */
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if (setting == DRIVE_STRENGTH_BIT_LOW)
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tmp &= ~BIT(pin);
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else
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tmp |= BIT(pin);
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writel_relaxed(tmp, pio + SAM9X60_PIO_DRIVER1);
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}
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static struct at91_pinctrl_mux_ops at91rm9200_ops = {
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.get_periph = at91_mux_get_periph,
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.mux_A_periph = at91_mux_set_A_periph,
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@ -639,6 +671,26 @@ static struct at91_pinctrl_mux_ops at91sam9x5_ops = {
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.irq_type = alt_gpio_irq_type,
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};
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static const struct at91_pinctrl_mux_ops sam9x60_ops = {
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.get_periph = at91_mux_pio3_get_periph,
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.mux_A_periph = at91_mux_pio3_set_A_periph,
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.mux_B_periph = at91_mux_pio3_set_B_periph,
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.mux_C_periph = at91_mux_pio3_set_C_periph,
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.mux_D_periph = at91_mux_pio3_set_D_periph,
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.get_deglitch = at91_mux_pio3_get_deglitch,
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.set_deglitch = at91_mux_pio3_set_deglitch,
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.get_debounce = at91_mux_pio3_get_debounce,
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.set_debounce = at91_mux_pio3_set_debounce,
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.get_pulldown = at91_mux_pio3_get_pulldown,
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.set_pulldown = at91_mux_pio3_set_pulldown,
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.get_schmitt_trig = at91_mux_pio3_get_schmitt_trig,
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.disable_schmitt_trig = at91_mux_pio3_disable_schmitt_trig,
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.get_drivestrength = at91_mux_sam9x60_get_drivestrength,
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.set_drivestrength = at91_mux_sam9x60_set_drivestrength,
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.irq_type = alt_gpio_irq_type,
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};
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static struct at91_pinctrl_mux_ops sama5d3_ops = {
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.get_periph = at91_mux_pio3_get_periph,
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.mux_A_periph = at91_mux_pio3_set_A_periph,
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@ -69,4 +69,6 @@
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#define AT91SAM9X5_PIO_DRIVER1 0x114 /*PIO Driver 1 register offset*/
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#define AT91SAM9X5_PIO_DRIVER2 0x118 /*PIO Driver 2 register offset*/
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#define SAM9X60_PIO_DRIVER1 0x118 /* PIO Driver 1 register offset */
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#endif
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