Qualcomm ARM dts updates for v5.9

Add QFPROM and ethernet for ipq8064 and a new DTS for the MikroTik
 RB3011 using the same platform.
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Merge tag 'qcom-dts-for-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt

Qualcomm ARM dts updates for v5.9

Add QFPROM and ethernet for ipq8064 and a new DTS for the MikroTik
RB3011 using the same platform.

* tag 'qcom-dts-for-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
  ARM: dts: qcom: add qfprom definition to ipq806x
  ARM: dts: qcom: Add MikroTik RB3011
  ARM: dts: qcom: add ethernet definitions to ipq8064

Link: https://lore.kernel.org/r/20200721045032.3430395-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2020-07-22 21:58:15 +02:00
commit 42f8362abd
3 changed files with 424 additions and 0 deletions

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@ -896,6 +896,7 @@ dtb-$(CONFIG_ARCH_QCOM) += \
qcom-ipq4019-ap.dk07.1-c1.dtb \
qcom-ipq4019-ap.dk07.1-c2.dtb \
qcom-ipq8064-ap148.dtb \
qcom-ipq8064-rb3011.dtb \
qcom-msm8660-surf.dtb \
qcom-msm8960-cdp.dtb \
qcom-msm8974-fairphone-fp2.dtb \

View File

@ -0,0 +1,308 @@
// SPDX-License-Identifier: GPL-2.0
#include "qcom-ipq8064.dtsi"
#include <dt-bindings/input/input.h>
/ {
model = "MikroTik RB3011UiAS-RM";
compatible = "mikrotik,rb3011";
aliases {
serial0 = &gsbi7_serial;
ethernet0 = &gmac0;
ethernet1 = &gmac3;
mdio-gpio0 = &mdio0;
mdio-gpio1 = &mdio1;
};
chosen {
bootargs = "loglevel=8 console=ttyMSM0,115200";
stdout-path = "serial0:115200n8";
};
memory@0 {
reg = <0x42000000 0x3e000000>;
device_type = "memory";
};
mdio0: mdio@0 {
status = "okay";
compatible = "virtual,mdio-gpio";
gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH>,
<&qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
pinctrl-0 = <&mdio0_pins>;
pinctrl-names = "default";
switch0: switch@10 {
compatible = "qca,qca8337";
#address-cells = <1>;
#size-cells = <0>;
dsa,member = <0 0>;
pinctrl-0 = <&sw0_reset_pin>;
pinctrl-names = "default";
reset-gpios = <&qcom_pinmux 16 GPIO_ACTIVE_LOW>;
reg = <0x10>;
ports {
#address-cells = <1>;
#size-cells = <0>;
switch0cpu: port@0 {
reg = <0>;
label = "cpu";
ethernet = <&gmac0>;
phy-mode = "rgmii-id";
fixed-link {
speed = <1000>;
full-duplex;
};
};
port@1 {
reg = <1>;
label = "sw1";
};
port@2 {
reg = <2>;
label = "sw2";
};
port@3 {
reg = <3>;
label = "sw3";
};
port@4 {
reg = <4>;
label = "sw4";
};
port@5 {
reg = <5>;
label = "sw5";
};
};
};
};
mdio1: mdio@1 {
status = "okay";
compatible = "virtual,mdio-gpio";
gpios = <&qcom_pinmux 11 GPIO_ACTIVE_HIGH>,
<&qcom_pinmux 10 GPIO_ACTIVE_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
pinctrl-0 = <&mdio1_pins>;
pinctrl-names = "default";
switch1: switch@14 {
compatible = "qca,qca8337";
#address-cells = <1>;
#size-cells = <0>;
dsa,member = <1 0>;
pinctrl-0 = <&sw1_reset_pin>;
pinctrl-names = "default";
reset-gpios = <&qcom_pinmux 17 GPIO_ACTIVE_LOW>;
reg = <0x10>;
ports {
#address-cells = <1>;
#size-cells = <0>;
switch1cpu: port@0 {
reg = <0>;
label = "cpu";
ethernet = <&gmac3>;
phy-mode = "sgmii";
fixed-link {
speed = <1000>;
full-duplex;
};
};
port@1 {
reg = <1>;
label = "sw6";
};
port@2 {
reg = <2>;
label = "sw7";
};
port@3 {
reg = <3>;
label = "sw8";
};
port@4 {
reg = <4>;
label = "sw9";
};
port@5 {
reg = <5>;
label = "sw10";
};
};
};
};
soc {
gsbi5: gsbi@1a200000 {
qcom,mode = <GSBI_PROT_SPI>;
status = "okay";
spi4: spi@1a280000 {
status = "okay";
spi-max-frequency = <50000000>;
pinctrl-0 = <&spi_pins>;
pinctrl-names = "default";
cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
norflash: s25fl016k@0 {
compatible = "jedec,spi-nor";
#address-cells = <1>;
#size-cells = <1>;
spi-max-frequency = <50000000>;
reg = <0>;
partition@0 {
label = "RouterBoot";
reg = <0x0 0x40000>;
};
};
};
};
gpio_keys {
compatible = "gpio-keys";
pinctrl-0 = <&buttons_pins>;
pinctrl-names = "default";
button@1 {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&qcom_pinmux 66 GPIO_ACTIVE_LOW>;
linux,input-type = <1>;
debounce-interval = <60>;
};
};
leds {
compatible = "gpio-leds";
pinctrl-0 = <&leds_pins>;
pinctrl-names = "default";
led@7 {
label = "rb3011:green:user";
gpios = <&qcom_pinmux 33 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
};
};
};
&gmac0 {
status = "okay";
phy-mode = "rgmii";
qcom,id = <0>;
phy-handle = <&switch0cpu>;
fixed-link {
speed = <1000>;
full-duplex;
};
};
&gmac3 {
status = "okay";
phy-mode = "sgmii";
qcom,id = <3>;
phy-handle = <&switch1cpu>;
fixed-link {
speed = <1000>;
full-duplex;
};
};
&gsbi7 {
status = "okay";
qcom,mode = <GSBI_PROT_I2C_UART>;
};
&gsbi7_serial {
status = "okay";
};
&qcom_pinmux {
buttons_pins: buttons_pins {
mux {
pins = "gpio66";
drive-strength = <16>;
bias-disable;
};
};
leds_pins: leds_pins {
mux {
pins = "gpio33";
drive-strength = <16>;
bias-disable;
};
};
mdio0_pins: mdio0_pins {
mux {
pins = "gpio0", "gpio1";
function = "gpio";
drive-strength = <8>;
bias-disable;
};
};
mdio1_pins: mdio1_pins {
mux {
pins = "gpio10", "gpio11";
function = "gpio";
drive-strength = <8>;
bias-disable;
};
};
sw0_reset_pin: sw0_reset_pin {
mux {
pins = "gpio16";
drive-strength = <16>;
function = "gpio";
bias-disable;
input-disable;
};
};
sw1_reset_pin: sw1_reset_pin {
mux {
pins = "gpio17";
drive-strength = <16>;
function = "gpio";
bias-disable;
input-disable;
};
};
};

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@ -425,6 +425,13 @@
qcom,controller-type = "pmic-arbiter";
};
qfprom: qfprom@700000 {
compatible = "qcom,qfprom";
reg = <0x00700000 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
};
gcc: clock-controller@900000 {
compatible = "qcom,gcc-ipq8064";
reg = <0x00900000 0x4000>;
@ -597,6 +604,114 @@
perst-gpio = <&qcom_pinmux 63 GPIO_ACTIVE_LOW>;
};
nss_common: syscon@03000000 {
compatible = "syscon";
reg = <0x03000000 0x0000FFFF>;
};
qsgmii_csr: syscon@1bb00000 {
compatible = "syscon";
reg = <0x1bb00000 0x000001FF>;
};
stmmac_axi_setup: stmmac-axi-config {
snps,wr_osr_lmt = <7>;
snps,rd_osr_lmt = <7>;
snps,blen = <16 0 0 0 0 0 0>;
};
gmac0: ethernet@37000000 {
device_type = "network";
compatible = "qcom,ipq806x-gmac";
reg = <0x37000000 0x200000>;
interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "macirq";
snps,axi-config = <&stmmac_axi_setup>;
snps,pbl = <32>;
snps,aal = <1>;
qcom,nss-common = <&nss_common>;
qcom,qsgmii-csr = <&qsgmii_csr>;
clocks = <&gcc GMAC_CORE1_CLK>;
clock-names = "stmmaceth";
resets = <&gcc GMAC_CORE1_RESET>;
reset-names = "stmmaceth";
status = "disabled";
};
gmac1: ethernet@37200000 {
device_type = "network";
compatible = "qcom,ipq806x-gmac";
reg = <0x37200000 0x200000>;
interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "macirq";
snps,axi-config = <&stmmac_axi_setup>;
snps,pbl = <32>;
snps,aal = <1>;
qcom,nss-common = <&nss_common>;
qcom,qsgmii-csr = <&qsgmii_csr>;
clocks = <&gcc GMAC_CORE2_CLK>;
clock-names = "stmmaceth";
resets = <&gcc GMAC_CORE2_RESET>;
reset-names = "stmmaceth";
status = "disabled";
};
gmac2: ethernet@37400000 {
device_type = "network";
compatible = "qcom,ipq806x-gmac";
reg = <0x37400000 0x200000>;
interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "macirq";
snps,axi-config = <&stmmac_axi_setup>;
snps,pbl = <32>;
snps,aal = <1>;
qcom,nss-common = <&nss_common>;
qcom,qsgmii-csr = <&qsgmii_csr>;
clocks = <&gcc GMAC_CORE3_CLK>;
clock-names = "stmmaceth";
resets = <&gcc GMAC_CORE3_RESET>;
reset-names = "stmmaceth";
status = "disabled";
};
gmac3: ethernet@37600000 {
device_type = "network";
compatible = "qcom,ipq806x-gmac";
reg = <0x37600000 0x200000>;
interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "macirq";
snps,axi-config = <&stmmac_axi_setup>;
snps,pbl = <32>;
snps,aal = <1>;
qcom,nss-common = <&nss_common>;
qcom,qsgmii-csr = <&qsgmii_csr>;
clocks = <&gcc GMAC_CORE4_CLK>;
clock-names = "stmmaceth";
resets = <&gcc GMAC_CORE4_RESET>;
reset-names = "stmmaceth";
status = "disabled";
};
vsdcc_fixed: vsdcc-regulator {
compatible = "regulator-fixed";
regulator-name = "SDCC Power";