PCI: Fix kernel-doc errors
Fix kernel-doc formatting errors, function names that don't match the doc, and some missing parameter documentation. These are reported by: make W=1 drivers/pci/ No functional change intended. [bhelgaas: squashed into one patch since this only changes comments] Link: https://lore.kernel.org/r/20210311001724.423356-1-kw@linux.com Link: https://lore.kernel.org/r/20210311001724.423356-2-kw@linux.com Link: https://lore.kernel.org/r/20210311001724.423356-3-kw@linux.com Link: https://lore.kernel.org/r/20210311001724.423356-4-kw@linux.com Link: https://lore.kernel.org/r/20210311001724.423356-5-kw@linux.com Link: https://lore.kernel.org/r/20210311001724.423356-6-kw@linux.com Link: https://lore.kernel.org/r/20210311001724.423356-7-kw@linux.com Link: https://lore.kernel.org/r/20210311001724.423356-8-kw@linux.com Signed-off-by: Krzysztof Wilczyński <kw@linux.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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@ -480,7 +480,7 @@ EXPORT_SYMBOL_GPL(pci_pasid_features);
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#define PASID_NUMBER_SHIFT 8
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#define PASID_NUMBER_MASK (0x1f << PASID_NUMBER_SHIFT)
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/**
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* pci_max_pasid - Get maximum number of PASIDs supported by device
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* pci_max_pasids - Get maximum number of PASIDs supported by device
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* @pdev: PCI device structure
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*
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* Returns negative value when PASID capability is not present.
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@ -1,5 +1,5 @@
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// SPDX-License-Identifier: GPL-2.0
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/**
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/*
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* pci-j721e - PCIe controller driver for TI's J721E SoCs
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*
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* Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com
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@ -346,8 +346,9 @@ static const struct irq_domain_ops ks_pcie_legacy_irq_domain_ops = {
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};
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/**
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* ks_pcie_set_dbi_mode() - Set DBI mode to access overlaid BAR mask
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* registers
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* ks_pcie_set_dbi_mode() - Set DBI mode to access overlaid BAR mask registers
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* @ks_pcie: A pointer to the keystone_pcie structure which holds the KeyStone
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* PCIe host controller driver information.
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*
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* Since modification of dbi_cs2 involves different clock domain, read the
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* status back to ensure the transition is complete.
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@ -367,6 +368,8 @@ static void ks_pcie_set_dbi_mode(struct keystone_pcie *ks_pcie)
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/**
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* ks_pcie_clear_dbi_mode() - Disable DBI mode
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* @ks_pcie: A pointer to the keystone_pcie structure which holds the KeyStone
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* PCIe host controller driver information.
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*
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* Since modification of dbi_cs2 involves different clock domain, read the
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* status back to ensure the transition is complete.
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@ -449,6 +452,7 @@ static struct pci_ops ks_child_pcie_ops = {
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/**
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* ks_pcie_v3_65_add_bus() - keystone add_bus post initialization
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* @bus: A pointer to the PCI bus structure.
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*
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* This sets BAR0 to enable inbound access for MSI_IRQ register
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*/
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@ -488,6 +492,8 @@ static struct pci_ops ks_pcie_ops = {
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/**
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* ks_pcie_link_up() - Check if link up
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* @pci: A pointer to the dw_pcie structure which holds the DesignWare PCIe host
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* controller driver information.
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*/
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static int ks_pcie_link_up(struct dw_pcie *pci)
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{
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@ -605,7 +611,6 @@ static void ks_pcie_msi_irq_handler(struct irq_desc *desc)
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/**
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* ks_pcie_legacy_irq_handler() - Handle legacy interrupt
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* @irq: IRQ line for legacy interrupts
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* @desc: Pointer to irq descriptor
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*
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* Traverse through pending legacy interrupts and invoke handler for each. Also
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@ -1,5 +1,5 @@
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// SPDX-License-Identifier: GPL-2.0
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/**
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/*
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* Endpoint Function Driver to implement Non-Transparent Bridge functionality
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*
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* Copyright (C) 2020 Texas Instruments
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@ -696,7 +696,8 @@ reset_handler:
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/**
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* epf_ntb_peer_spad_bar_clear() - Clear Peer Scratchpad BAR
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* @ntb: NTB device that facilitates communication between HOST1 and HOST2
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* @ntb_epc: EPC associated with one of the HOST which holds peer's outbound
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* address.
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*
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*+-----------------+------->+------------------+ +-----------------+
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*| BAR0 | | CONFIG REGION | | BAR0 |
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@ -740,6 +741,7 @@ static void epf_ntb_peer_spad_bar_clear(struct epf_ntb_epc *ntb_epc)
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/**
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* epf_ntb_peer_spad_bar_set() - Set peer scratchpad BAR
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* @ntb: NTB device that facilitates communication between HOST1 and HOST2
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* @type: PRIMARY interface or SECONDARY interface
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*
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*+-----------------+------->+------------------+ +-----------------+
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*| BAR0 | | CONFIG REGION | | BAR0 |
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@ -808,7 +810,8 @@ static int epf_ntb_peer_spad_bar_set(struct epf_ntb *ntb,
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/**
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* epf_ntb_config_sspad_bar_clear() - Clear Config + Self scratchpad BAR
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* @ntb: NTB device that facilitates communication between HOST1 and HOST2
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* @ntb_epc: EPC associated with one of the HOST which holds peer's outbound
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* address.
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*
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* +-----------------+------->+------------------+ +-----------------+
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* | BAR0 | | CONFIG REGION | | BAR0 |
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@ -851,7 +854,8 @@ static void epf_ntb_config_sspad_bar_clear(struct epf_ntb_epc *ntb_epc)
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/**
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* epf_ntb_config_sspad_bar_set() - Set Config + Self scratchpad BAR
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* @ntb: NTB device that facilitates communication between HOST1 and HOST2
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* @ntb_epc: EPC associated with one of the HOST which holds peer's outbound
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* address.
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*
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* +-----------------+------->+------------------+ +-----------------+
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* | BAR0 | | CONFIG REGION | | BAR0 |
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@ -1312,6 +1316,7 @@ static int epf_ntb_configure_interrupt(struct epf_ntb *ntb,
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/**
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* epf_ntb_alloc_peer_mem() - Allocate memory in peer's outbound address space
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* @dev: The PCI device.
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* @ntb_epc: EPC associated with one of the HOST whose BAR holds peer's outbound
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* address
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* @bar: BAR of @ntb_epc in for which memory has to be allocated (could be
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@ -1660,7 +1665,6 @@ static int epf_ntb_init_epc_bar_interface(struct epf_ntb *ntb,
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* epf_ntb_init_epc_bar() - Identify BARs to be used for each of the NTB
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* constructs (scratchpad region, doorbell, memorywindow)
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* @ntb: NTB device that facilitates communication between HOST1 and HOST2
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* @type: PRIMARY interface or SECONDARY interface
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*
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* Wrapper to epf_ntb_init_epc_bar_interface() to identify the free BARs
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* to be used for each of BAR_CONFIG, BAR_PEER_SPAD, BAR_DB_MW1, BAR_MW2,
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@ -2037,6 +2041,8 @@ static const struct config_item_type ntb_group_type = {
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/**
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* epf_ntb_add_cfs() - Add configfs directory specific to NTB
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* @epf: NTB endpoint function device
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* @group: A pointer to the config_group structure referencing a group of
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* config_items of a specific type that belong to a specific sub-system.
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*
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* Add configfs directory specific to NTB. This directory will hold
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* NTB specific properties like db_count, spad_count, num_mws etc.,
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@ -1,5 +1,5 @@
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// SPDX-License-Identifier: GPL-2.0
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/**
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/*
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* Test driver to test endpoint functionality
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*
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* Copyright (C) 2017 Texas Instruments
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@ -594,6 +594,8 @@ EXPORT_SYMBOL_GPL(pci_epc_add_epf);
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* pci_epc_remove_epf() - remove PCI endpoint function from endpoint controller
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* @epc: the EPC device from which the endpoint function should be removed
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* @epf: the endpoint function to be removed
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* @type: identifies if the EPC is connected to the primary or secondary
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* interface of EPF
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*
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* Invoke to remove PCI endpoint function from the endpoint controller.
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*/
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@ -157,7 +157,7 @@ static int pcihp_is_ejectable(acpi_handle handle)
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}
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/**
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* acpi_pcihp_check_ejectable - check if handle is ejectable ACPI PCI slot
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* acpi_pci_check_ejectable - check if handle is ejectable ACPI PCI slot
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* @pbus: the PCI bus of the PCI slot corresponding to 'handle'
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* @handle: ACPI handle to check
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*
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@ -190,10 +190,18 @@ int of_pci_parse_bus_range(struct device_node *node, struct resource *res)
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EXPORT_SYMBOL_GPL(of_pci_parse_bus_range);
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/**
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* This function will try to obtain the host bridge domain number by
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* finding a property called "linux,pci-domain" of the given device node.
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* of_get_pci_domain_nr - Find the host bridge domain number
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* of the given device node.
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* @node: Device tree node with the domain information.
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*
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* @node: device tree node with the domain information
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* This function will try to obtain the host bridge domain number by finding
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* a property called "linux,pci-domain" of the given device node.
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*
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* Return:
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* * > 0 - On success, an associated domain number.
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* * -EINVAL - The property "linux,pci-domain" does not exist.
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* * -ENODATA - The linux,pci-domain" property does not have value.
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* * -EOVERFLOW - Invalid "linux,pci-domain" property value.
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*
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* Returns the associated domain number from DT in the range [0-0xffff], or
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* a negative value if the required property is not found.
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@ -585,10 +593,16 @@ int devm_of_pci_bridge_init(struct device *dev, struct pci_host_bridge *bridge)
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#endif /* CONFIG_PCI */
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/**
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* of_pci_get_max_link_speed - Find the maximum link speed of the given device node.
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* @node: Device tree node with the maximum link speed information.
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*
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* This function will try to find the limitation of link speed by finding
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* a property called "max-link-speed" of the given device node.
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*
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* @node: device tree node with the max link speed information
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* Return:
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* * > 0 - On success, a maximum link speed.
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* * -EINVAL - Invalid "max-link-speed" property value, or failure to access
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* the property of the device tree node.
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*
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* Returns the associated max link speed from DT, or a negative value if the
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* required property is not found or is invalid.
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@ -129,7 +129,7 @@ static const char * const ecrc_policy_str[] = {
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};
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/**
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* enable_ercr_checking - enable PCIe ECRC checking for a device
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* enable_ecrc_checking - enable PCIe ECRC checking for a device
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* @dev: the PCI device
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*
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* Returns 0 on success, or negative on failure.
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@ -153,7 +153,7 @@ static int enable_ecrc_checking(struct pci_dev *dev)
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}
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/**
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* disable_ercr_checking - disables PCIe ECRC checking for a device
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* disable_ecrc_checking - disables PCIe ECRC checking for a device
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* @dev: the PCI device
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*
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* Returns 0 on success, or negative on failure.
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@ -1442,7 +1442,7 @@ static struct pcie_port_service_driver aerdriver = {
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};
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/**
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* aer_service_init - register AER root service driver
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* pcie_aer_init - register AER root service driver
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*
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* Invoked when AER root service driver is loaded.
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*/
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@ -463,7 +463,7 @@ static struct pcie_port_service_driver pcie_pme_driver = {
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};
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/**
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* pcie_pme_service_init - Register the PCIe PME service driver.
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* pcie_pme_init - Register the PCIe PME service driver.
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*/
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int __init pcie_pme_init(void)
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{
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