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ARM64: dts: marvell: armada37xx: Fix timer interrupt specifiers

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commit 88cda00733f0731711c76e535d4972c296ac512e upstream.

Contrary to popular belief, PPIs connected to a GICv3 to not have
an affinity field similar to that of GICv2. That is consistent
with the fact that GICv3 is designed to accomodate thousands of
CPUs, and fitting them as a bitmap in a byte is... difficult.

Fixes: adbc3695d9e4 ("arm64: dts: add the Marvell Armada 3700 family and a development board")
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Marc Zyngier 2017-06-21 22:45:08 +01:00 committed by Greg Kroah-Hartman
parent f31c4f65dd
commit 445a945ad6
1 changed files with 4 additions and 8 deletions
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12
arch/arm64/boot/dts/marvell/armada-37xx.dtsi
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@ -75,14 +75,10 @@
timer {
compatible = "arm,armv8-timer";
interrupts = <GIC_PPI 13
(GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>,
<GIC_PPI 14
(GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>,
<GIC_PPI 11
(GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>,
<GIC_PPI 10
(GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>,
<GIC_PPI 14 IRQ_TYPE_LEVEL_HIGH>,
<GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>,
<GIC_PPI 10 IRQ_TYPE_LEVEL_HIGH>;
};
soc {