Merge git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6
Pull crypto updates from Herbert Xu: - Fixed algorithm construction hang when self-test fails. - Added SHA variants to talitos AEAD list. - New driver for Exynos random number generator. - Performance enhancements for arc4. - Added hwrng support to caam. - Added ahash support to caam. - Fixed bad kfree in aesni-intel. - Allow aesni-intel in FIPS mode. - Added atmel driver with support for AES/3DES/SHA. - Bug fixes for mv_cesa. - CRC hardware driver for BF60x family processors. * git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6: (66 commits) crypto: twofish-avx - remove useless instruction crypto: testmgr - add aead cbc aes hmac sha1,256,512 test vectors crypto: talitos - add sha224, sha384 and sha512 to existing AEAD algorithms crypto: talitos - export the talitos_submit function crypto: talitos - move talitos structures to header file crypto: atmel - add new tests to tcrypt crypto: atmel - add Atmel SHA1/SHA256 driver crypto: atmel - add Atmel DES/TDES driver crypto: atmel - add Atmel AES driver ARM: AT91SAM9G45: add crypto peripherals crypto: testmgr - allow aesni-intel and ghash_clmulni-intel in fips mode hwrng: exynos - Add support for Exynos random number generator crypto: aesni-intel - fix wrong kfree pointer crypto: caam - ERA retrieval and printing for SEC device crypto: caam - Using alloc_coherent for caam job rings crypto: algapi - Fix hang on crypto allocation crypto: arc4 - now arc needs blockcipher support crypto: caam - one tasklet per job ring crypto: caam - consolidate memory barriers from job ring en/dequeue crypto: caam - only query h/w in job ring dequeue path ...
This commit is contained in:
@ -183,6 +183,13 @@ static struct clk adc_op_clk = {
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.rate_hz = 13200000,
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};
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/* AES/TDES/SHA clock - Only for sam9m11/sam9g56 */
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static struct clk aestdessha_clk = {
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.name = "aestdessha_clk",
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.pmc_mask = 1 << AT91SAM9G45_ID_AESTDESSHA,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk *periph_clocks[] __initdata = {
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&pioA_clk,
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&pioB_clk,
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@ -212,6 +219,7 @@ static struct clk *periph_clocks[] __initdata = {
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&udphs_clk,
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&mmc1_clk,
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&adc_op_clk,
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&aestdessha_clk,
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// irq0
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};
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@ -232,6 +240,9 @@ static struct clk_lookup periph_clocks_lookups[] = {
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CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc0_clk),
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CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk),
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CLKDEV_CON_DEV_ID(NULL, "atmel-trng", &trng_clk),
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CLKDEV_CON_DEV_ID(NULL, "atmel_sha", &aestdessha_clk),
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CLKDEV_CON_DEV_ID(NULL, "atmel_tdes", &aestdessha_clk),
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CLKDEV_CON_DEV_ID(NULL, "atmel_aes", &aestdessha_clk),
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/* more usart lookup table for DT entries */
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CLKDEV_CON_DEV_ID("usart", "ffffee00.serial", &mck),
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CLKDEV_CON_DEV_ID("usart", "fff8c000.serial", &usart0_clk),
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@ -388,7 +399,7 @@ static unsigned int at91sam9g45_default_irq_priority[NR_AIC_IRQS] __initdata = {
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3, /* Ethernet */
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0, /* Image Sensor Interface */
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2, /* USB Device High speed port */
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0,
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0, /* AESTDESSHA Crypto HW Accelerators */
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0, /* Multimedia Card Interface 1 */
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0,
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0, /* Advanced Interrupt Controller (IRQ0) */
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