net: mdio: mux-meson-g12a: use __clk_is_enabled to simplify the code
By using __clk_is_enabled () we can avoid defining an own variable for tracking whether enable counter is zero. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -53,7 +53,6 @@
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#define MESON_G12A_MDIO_INTERNAL_ID 1
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#define MESON_G12A_MDIO_INTERNAL_ID 1
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struct g12a_mdio_mux {
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struct g12a_mdio_mux {
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bool pll_is_enabled;
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void __iomem *regs;
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void __iomem *regs;
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void *mux_handle;
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void *mux_handle;
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struct clk *pll;
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struct clk *pll;
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@ -154,14 +153,12 @@ static int g12a_enable_internal_mdio(struct g12a_mdio_mux *priv)
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int ret;
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int ret;
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/* Enable the phy clock */
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/* Enable the phy clock */
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if (!priv->pll_is_enabled) {
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if (!__clk_is_enabled(priv->pll)) {
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ret = clk_prepare_enable(priv->pll);
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ret = clk_prepare_enable(priv->pll);
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if (ret)
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if (ret)
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return ret;
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return ret;
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}
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}
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priv->pll_is_enabled = true;
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/* Initialize ephy control */
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/* Initialize ephy control */
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writel(EPHY_G12A_ID, priv->regs + ETH_PHY_CNTL0);
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writel(EPHY_G12A_ID, priv->regs + ETH_PHY_CNTL0);
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@ -192,10 +189,8 @@ static int g12a_enable_external_mdio(struct g12a_mdio_mux *priv)
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writel_relaxed(0x0, priv->regs + ETH_PHY_CNTL2);
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writel_relaxed(0x0, priv->regs + ETH_PHY_CNTL2);
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/* Disable the phy clock if enabled */
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/* Disable the phy clock if enabled */
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if (priv->pll_is_enabled) {
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if (__clk_is_enabled(priv->pll))
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clk_disable_unprepare(priv->pll);
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clk_disable_unprepare(priv->pll);
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priv->pll_is_enabled = false;
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}
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return 0;
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return 0;
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}
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}
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@ -347,7 +342,7 @@ static int g12a_mdio_mux_remove(struct platform_device *pdev)
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mdio_mux_uninit(priv->mux_handle);
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mdio_mux_uninit(priv->mux_handle);
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if (priv->pll_is_enabled)
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if (__clk_is_enabled(priv->pll))
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clk_disable_unprepare(priv->pll);
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clk_disable_unprepare(priv->pll);
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return 0;
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return 0;
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