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drm/[radeon|amdgpu]: Replace one-element array and use struct_size() helper

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The current codebase makes use of one-element arrays in the following
form:

struct something {
    int length;
    u8 data[1];
};

struct something *instance;

instance = kmalloc(sizeof(*instance) + size, GFP_KERNEL);
instance->length = size;
memcpy(instance->data, source, size);

but the preferred mechanism to declare variable-length types such as
these ones is a flexible array member[1][2], introduced in C99:

struct foo {
        int stuff;
        struct boo array[];
};

By making use of the mechanism above, we will get a compiler warning
in case the flexible array does not occur last in the structure, which
will help us prevent some kind of undefined behavior bugs from being
inadvertently introduced[3] to the codebase from now on. So, replace
the one-element array with a flexible-array member.

Also, make use of the new struct_size() helper to properly calculate the
size of struct SISLANDS_SMC_SWSTATE.

This issue was found with the help of Coccinelle and, audited and fixed
_manually_.

[1] https://gcc.gnu.org/onlinedocs/gcc/Zero-Length.html
[2] https://github.com/KSPP/linux/issues/21
[3] commit 76497732932f ("cxgb3/l2t: Fix undefined behaviour")

Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Gustavo A. R. Silva 2020-05-22 12:43:55 -05:00 committed by Alex Deucher
parent 6e20010a3a
commit 4541ea81ed
3 changed files with 5 additions and 7 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
drivers/gpu/drm/amd/amdgpu/si_dpm.c
View File

@ -5715,10 +5715,9 @@ static int si_upload_sw_state(struct amdgpu_device *adev,
int ret;
u32 address = si_pi->state_table_start +
offsetof(SISLANDS_SMC_STATETABLE, driverState);
u32 state_size = sizeof(SISLANDS_SMC_SWSTATE) +
((new_state->performance_level_count - 1) *
sizeof(SISLANDS_SMC_HW_PERFORMANCE_LEVEL));
SISLANDS_SMC_SWSTATE *smc_state = &si_pi->smc_statetable.driverState;
size_t state_size = struct_size(smc_state, levels,
new_state->performance_level_count);
memset(smc_state, 0, state_size);

2
drivers/gpu/drm/amd/amdgpu/sislands_smc.h
View File

@ -186,7 +186,7 @@ struct SISLANDS_SMC_SWSTATE
uint8_t levelCount;
uint8_t padding2;
uint8_t padding3;
SISLANDS_SMC_HW_PERFORMANCE_LEVEL levels[1];
SISLANDS_SMC_HW_PERFORMANCE_LEVEL levels[];
};
typedef struct SISLANDS_SMC_SWSTATE SISLANDS_SMC_SWSTATE;

5
drivers/gpu/drm/radeon/si_dpm.c
View File

@ -5253,10 +5253,9 @@ static int si_upload_sw_state(struct radeon_device *rdev,
int ret;
u32 address = si_pi->state_table_start +
offsetof(SISLANDS_SMC_STATETABLE, driverState);
u32 state_size = sizeof(SISLANDS_SMC_SWSTATE) +
((new_state->performance_level_count - 1) *
sizeof(SISLANDS_SMC_HW_PERFORMANCE_LEVEL));
SISLANDS_SMC_SWSTATE *smc_state = &si_pi->smc_statetable.driverState;
size_t state_size = struct_size(smc_state, levels,
new_state->performance_level_count);
memset(smc_state, 0, state_size);