mfd: ti_am335x_tscadc: Fix spin lock and reg_cache
Reg_cache variable is used to lock step enable register from being accessed and written by both TSC and ADC at the same time. However, it isn't updated anywhere in the code at all. If both TSC and ADC are used, eventually 1FFFF is always written enabling all 16 steps uselessly causing a mess. Patch fixes it by correcting the locks and updates the variable by reading the step enable register Signed-off-by: Zubair Lutfullah <zubair.lutfullah@gmail.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
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@ -57,10 +57,10 @@ EXPORT_SYMBOL_GPL(am335x_tsc_se_update);
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void am335x_tsc_se_set(struct ti_tscadc_dev *tsadc, u32 val)
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{
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spin_lock(&tsadc->reg_lock);
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tsadc->reg_se_cache = tscadc_readl(tsadc, REG_SE);
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tsadc->reg_se_cache |= val;
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spin_unlock(&tsadc->reg_lock);
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am335x_tsc_se_update(tsadc);
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spin_unlock(&tsadc->reg_lock);
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}
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EXPORT_SYMBOL_GPL(am335x_tsc_se_set);
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