arm64: dts: qcom: msm8996: Fix the PCI I/O port range
[ Upstream commit cf0ac10feb17661987d0018eb9475dc03e2a2253 ] For 1MiB of the I/O region, the I/O ports of the legacy PCI devices are located in the range of 0x0 to 0x100000. Hence, fix the bogus PCI addresses (0x0c200000, 0x0d200000, 0x0e200000) specified in the ranges property for I/O region. While at it, let's also align the entries. Fixes: ed965ef89227 ("arm64: dts: qcom: msm8996: add support to pcie") Reported-by: Arnd Bergmann <arnd@arndb.de> Link: https://lore.kernel.org/linux-arm-msm/7c5dfa87-41df-4ba7-b0e4-72c8386402a8@app.fastmail.com/ Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230228164752.55682-8-manivannan.sadhasivam@linaro.org Signed-off-by: Sasha Levin <sashal@kernel.org>
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@ -744,8 +744,8 @@
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#address-cells = <3>;
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#size-cells = <2>;
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ranges = <0x01000000 0x0 0x0c200000 0x0c200000 0x0 0x100000>,
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<0x02000000 0x0 0x0c300000 0x0c300000 0x0 0xd00000>;
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ranges = <0x01000000 0x0 0x00000000 0x0c200000 0x0 0x100000>,
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<0x02000000 0x0 0x0c300000 0x0c300000 0x0 0xd00000>;
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interrupts = <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "msi";
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@ -796,8 +796,8 @@
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#address-cells = <3>;
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#size-cells = <2>;
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ranges = <0x01000000 0x0 0x0d200000 0x0d200000 0x0 0x100000>,
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<0x02000000 0x0 0x0d300000 0x0d300000 0x0 0xd00000>;
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ranges = <0x01000000 0x0 0x00000000 0x0d200000 0x0 0x100000>,
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<0x02000000 0x0 0x0d300000 0x0d300000 0x0 0xd00000>;
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interrupts = <GIC_SPI 413 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "msi";
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@ -845,8 +845,8 @@
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#address-cells = <3>;
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#size-cells = <2>;
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ranges = <0x01000000 0x0 0x0e200000 0x0e200000 0x0 0x100000>,
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<0x02000000 0x0 0x0e300000 0x0e300000 0x0 0x1d00000>;
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ranges = <0x01000000 0x0 0x00000000 0x0e200000 0x0 0x100000>,
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<0x02000000 0x0 0x0e300000 0x0e300000 0x0 0x1d00000>;
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device_type = "pci";
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