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arm64: dts: imx8mm: correct usb power domains

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pgc_otg1/2 is actual the power domain of usb PHY, usb controller
is in hsio power domain, and pgc_otg1/2 is required to be powered
up to detect usb remote wakeup, so move the pgc_otg1/2 power domain
to the usb phy node.

Fixes: 01df28d80859 ("arm64: dts: imx8mm: put USB controllers into power-domains")
Signed-off-by: Li Jun <jun.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Li Jun 2022-09-26 19:45:33 +08:00 committed by Shawn Guo
parent e1ec45b9a8
commit 4585c79ff4
1 changed files with 4 additions and 2 deletions
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6
arch/arm64/boot/dts/freescale/imx8mm.dtsi
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@ -276,6 +276,7 @@
assigned-clocks = <&clk IMX8MM_CLK_USB_PHY_REF>; assigned-clocks = <&clk IMX8MM_CLK_USB_PHY_REF>;
assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_100M>; assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_100M>;
clock-names = "main_clk"; clock-names = "main_clk";
power-domains = <&pgc_otg1>;
}; };
usbphynop2: usbphynop2 { usbphynop2: usbphynop2 {
@ -285,6 +286,7 @@
assigned-clocks = <&clk IMX8MM_CLK_USB_PHY_REF>; assigned-clocks = <&clk IMX8MM_CLK_USB_PHY_REF>;
assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_100M>; assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_100M>;
clock-names = "main_clk"; clock-names = "main_clk";
power-domains = <&pgc_otg2>;
}; };
soc: soc@0 { soc: soc@0 {
@ -1184,7 +1186,7 @@
assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_500M>; assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_500M>;
phys = <&usbphynop1>; phys = <&usbphynop1>;
fsl,usbmisc = <&usbmisc1 0>; fsl,usbmisc = <&usbmisc1 0>;
power-domains = <&pgc_otg1>; power-domains = <&pgc_hsiomix>;
status = "disabled"; status = "disabled";
}; };
@ -1204,7 +1206,7 @@
assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_500M>; assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_500M>;
phys = <&usbphynop2>; phys = <&usbphynop2>;
fsl,usbmisc = <&usbmisc2 0>; fsl,usbmisc = <&usbmisc2 0>;
power-domains = <&pgc_otg2>; power-domains = <&pgc_hsiomix>;
status = "disabled"; status = "disabled";
}; };