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riscv: dts: Re-organize the DT nodes

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As per the convention for any SOC device with external connection,
define only device DT node in SOC DTSi file with status = "disabled"
and enable device in Board DTS file with status = "okay"

Reported-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Yash Shah <yash.shah@sifive.com>
Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
This commit is contained in:
Yash Shah 2019-06-25 15:01:31 +05:30 committed by Paul Walmsley
parent ff8391e1b7
commit 45b03df286
2 changed files with 19 additions and 0 deletions
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6
arch/riscv/boot/dts/sifive/fu540-c000.dtsi
View File

@ -163,6 +163,7 @@
interrupt-parent = <&plic0>; interrupt-parent = <&plic0>;
interrupts = <4>; interrupts = <4>;
clocks = <&prci PRCI_CLK_TLCLK>; clocks = <&prci PRCI_CLK_TLCLK>;
status = "disabled";
}; };
uart1: serial@10011000 { uart1: serial@10011000 {
compatible = "sifive,fu540-c000-uart", "sifive,uart0"; compatible = "sifive,fu540-c000-uart", "sifive,uart0";
@ -170,6 +171,7 @@
interrupt-parent = <&plic0>; interrupt-parent = <&plic0>;
interrupts = <5>; interrupts = <5>;
clocks = <&prci PRCI_CLK_TLCLK>; clocks = <&prci PRCI_CLK_TLCLK>;
status = "disabled";
}; };
i2c0: i2c@10030000 { i2c0: i2c@10030000 {
compatible = "sifive,fu540-c000-i2c", "sifive,i2c0"; compatible = "sifive,fu540-c000-i2c", "sifive,i2c0";
@ -181,6 +183,7 @@
reg-io-width = <1>; reg-io-width = <1>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
status = "disabled";
}; };
qspi0: spi@10040000 { qspi0: spi@10040000 {
compatible = "sifive,fu540-c000-spi", "sifive,spi0"; compatible = "sifive,fu540-c000-spi", "sifive,spi0";
@ -191,6 +194,7 @@
clocks = <&prci PRCI_CLK_TLCLK>; clocks = <&prci PRCI_CLK_TLCLK>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
status = "disabled";
}; };
qspi1: spi@10041000 { qspi1: spi@10041000 {
compatible = "sifive,fu540-c000-spi", "sifive,spi0"; compatible = "sifive,fu540-c000-spi", "sifive,spi0";
@ -201,6 +205,7 @@
clocks = <&prci PRCI_CLK_TLCLK>; clocks = <&prci PRCI_CLK_TLCLK>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
status = "disabled";
}; };
qspi2: spi@10050000 { qspi2: spi@10050000 {
compatible = "sifive,fu540-c000-spi", "sifive,spi0"; compatible = "sifive,fu540-c000-spi", "sifive,spi0";
@ -210,6 +215,7 @@
clocks = <&prci PRCI_CLK_TLCLK>; clocks = <&prci PRCI_CLK_TLCLK>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
status = "disabled";
}; };
}; };
}; };

13
arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts
View File

@ -42,7 +42,20 @@
}; };
}; };
&uart0 {
status = "okay";
};
&uart1 {
status = "okay";
};
&i2c0 {
status = "okay";
};
&qspi0 { &qspi0 {
status = "okay";
flash@0 { flash@0 {
compatible = "issi,is25wp256", "jedec,spi-nor"; compatible = "issi,is25wp256", "jedec,spi-nor";
reg = <0>; reg = <0>;