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bus: ti-sysc: Improve reset to work with modules with no sysconfig

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[ Upstream commit ab4d309d8708035bd323b2e2446eb68cda5e61e5 ]

At least display susbsystem (DSS) has modules with no sysconfig registers
and rely on custom function for module reset handling. Let's make reset
work with that too.

Signed-off-by: Tony Lindgren <tony@atomide.com>
Stable-dep-of: 34539b442b3b ("bus: ti-sysc: Flush posted write on enable before reset")
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
Tony Lindgren 2020-02-24 12:58:03 -08:00 committed by Greg Kroah-Hartman
parent 210ff31342
commit 4637b2fa65
1 changed files with 6 additions and 4 deletions
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10
drivers/bus/ti-sysc.c
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@ -1809,7 +1809,7 @@ static int sysc_reset(struct sysc *ddata)
sysc_offset = ddata->offsets[SYSC_SYSCONFIG];
if (ddata->legacy_mode || sysc_offset < 0 ||
if (ddata->legacy_mode ||
ddata->cap->regbits->srst_shift < 0 ||
ddata->cfg.quirks & SYSC_QUIRK_NO_RESET_ON_INIT)
return 0;
@ -1819,9 +1819,11 @@ static int sysc_reset(struct sysc *ddata)
if (ddata->pre_reset_quirk)
ddata->pre_reset_quirk(ddata);
sysc_val = sysc_read_sysconfig(ddata);
sysc_val |= sysc_mask;
sysc_write(ddata, sysc_offset, sysc_val);
if (sysc_offset >= 0) {
sysc_val = sysc_read_sysconfig(ddata);
sysc_val |= sysc_mask;
sysc_write(ddata, sysc_offset, sysc_val);
}
if (ddata->cfg.srst_udelay)
usleep_range(ddata->cfg.srst_udelay,