[media] Add support for DViCO FusionHDTV DVB-T Dual Express2
DViCO FusionHDTV DVB-T Dual Express2 is cx23885 + dib7070 [m.chehab@samsung.com: fix conflicts and make checkpatch happy] Signed-off-by: James Harper <james.harper@ejbdigital.com.au> Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
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@ -650,6 +650,11 @@ struct cx23885_board cx23885_boards[] = {
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.amux = CX25840_AUDIO6,
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.amux = CX25840_AUDIO6,
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} },
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} },
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},
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},
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[CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2] = {
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.name = "DViCO FusionHDTV DVB-T Dual Express2",
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.portb = CX23885_MPEG_DVB,
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.portc = CX23885_MPEG_DVB,
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},
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[CX23885_BOARD_HAUPPAUGE_IMPACTVCBE] = {
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[CX23885_BOARD_HAUPPAUGE_IMPACTVCBE] = {
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.name = "Hauppauge ImpactVCB-e",
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.name = "Hauppauge ImpactVCB-e",
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.tuner_type = TUNER_ABSENT,
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.tuner_type = TUNER_ABSENT,
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@ -920,6 +925,10 @@ struct cx23885_subid cx23885_subids[] = {
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.subvendor = 0x0070,
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.subvendor = 0x0070,
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.subdevice = 0x7133,
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.subdevice = 0x7133,
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.card = CX23885_BOARD_HAUPPAUGE_IMPACTVCBE,
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.card = CX23885_BOARD_HAUPPAUGE_IMPACTVCBE,
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}, {
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.subvendor = 0x18ac,
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.subdevice = 0xdb98,
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.card = CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2,
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},
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},
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};
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};
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const unsigned int cx23885_idcount = ARRAY_SIZE(cx23885_subids);
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const unsigned int cx23885_idcount = ARRAY_SIZE(cx23885_subids);
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@ -1163,6 +1172,7 @@ int cx23885_tuner_callback(void *priv, int component, int command, int arg)
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break;
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break;
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case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
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case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
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case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
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case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
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case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2:
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/* Two identical tuners on two different i2c buses,
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/* Two identical tuners on two different i2c buses,
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* we need to reset the correct gpio. */
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* we need to reset the correct gpio. */
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if (port->nr == 1)
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if (port->nr == 1)
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@ -1306,6 +1316,7 @@ void cx23885_gpio_setup(struct cx23885_dev *dev)
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cx_set(GP0_IO, 0x000f000f);
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cx_set(GP0_IO, 0x000f000f);
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break;
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break;
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case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
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case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
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case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2:
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/* GPIO-0 portb xc3028 reset */
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/* GPIO-0 portb xc3028 reset */
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/* GPIO-1 portb zl10353 reset */
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/* GPIO-1 portb zl10353 reset */
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/* GPIO-2 portc xc3028 reset */
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/* GPIO-2 portc xc3028 reset */
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@ -1611,6 +1622,7 @@ int cx23885_ir_init(struct cx23885_dev *dev)
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ir_rxtx_pin_cfg_count, ir_rxtx_pin_cfg);
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ir_rxtx_pin_cfg_count, ir_rxtx_pin_cfg);
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break;
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break;
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case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
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case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
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case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2:
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request_module("ir-kbd-i2c");
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request_module("ir-kbd-i2c");
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break;
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break;
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}
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}
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@ -1747,6 +1759,7 @@ void cx23885_card_setup(struct cx23885_dev *dev)
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break;
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break;
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case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
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case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
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case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
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case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
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case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2:
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ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
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ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
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ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
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ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
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ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
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ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
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@ -44,6 +44,7 @@
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#include "tuner-xc2028.h"
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#include "tuner-xc2028.h"
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#include "tuner-simple.h"
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#include "tuner-simple.h"
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#include "dib7000p.h"
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#include "dib7000p.h"
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#include "dib0070.h"
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#include "dibx000_common.h"
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#include "dibx000_common.h"
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#include "zl10353.h"
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#include "zl10353.h"
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#include "stv0900.h"
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#include "stv0900.h"
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@ -746,6 +747,106 @@ static int netup_altera_fpga_rw(void *device, int flag, int data, int read)
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return 0;
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return 0;
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};
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};
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static int dib7070_tuner_reset(struct dvb_frontend *fe, int onoff)
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{
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struct dib7000p_ops *dib7000p_ops = fe->sec_priv;
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return dib7000p_ops->set_gpio(fe, 8, 0, !onoff);
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}
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static int dib7070_tuner_sleep(struct dvb_frontend *fe, int onoff)
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{
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return 0;
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}
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static struct dib0070_config dib7070p_dib0070_config = {
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.i2c_address = DEFAULT_DIB0070_I2C_ADDRESS,
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.reset = dib7070_tuner_reset,
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.sleep = dib7070_tuner_sleep,
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.clock_khz = 12000,
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.freq_offset_khz_vhf = 950,
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.freq_offset_khz_vhf = 550,
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/* .flip_chip = 1, */
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};
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/* DIB7070 generic */
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static struct dibx000_agc_config dib7070_agc_config = {
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.band_caps = BAND_UHF | BAND_VHF | BAND_LBAND | BAND_SBAND,
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/*
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* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=5,
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* P_agc_inv_pwm1=0, P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0,
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* P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, P_agc_write=0
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*/
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.setup = (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) |
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(0 << 8) | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0),
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.inv_gain = 600,
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.time_stabiliz = 10,
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.alpha_level = 0,
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.thlock = 118,
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.wbd_inv = 0,
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.wbd_ref = 3530,
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.wbd_sel = 1,
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.wbd_alpha = 5,
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.agc1_max = 65535,
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.agc1_min = 0,
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.agc2_max = 65535,
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.agc2_min = 0,
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.agc1_pt1 = 0,
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.agc1_pt2 = 40,
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.agc1_pt3 = 183,
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.agc1_slope1 = 206,
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.agc1_slope2 = 255,
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.agc2_pt1 = 72,
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.agc2_pt2 = 152,
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.agc2_slope1 = 88,
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.agc2_slope2 = 90,
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.alpha_mant = 17,
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.alpha_exp = 27,
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.beta_mant = 23,
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.beta_exp = 51,
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.perform_agc_softsplit = 0,
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};
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static struct dibx000_bandwidth_config dib7070_bw_config_12_mhz = {
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.internal = 60000,
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.sampling = 15000,
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.pll_prediv = 1,
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.pll_ratio = 20,
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.pll_range = 3,
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.pll_reset = 1,
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.pll_bypass = 0,
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.enable_refdiv = 0,
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.bypclk_div = 0,
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.IO_CLK_en_core = 1,
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.ADClkSrc = 1,
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.modulo = 2,
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/* refsel, sel, freq_15k */
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.sad_cfg = (3 << 14) | (1 << 12) | (524 << 0),
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.ifreq = (0 << 25) | 0,
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.timf = 20452225,
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.xtal_hz = 12000000,
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};
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static struct dib7000p_config dib7070p_dib7000p_config = {
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/* .output_mode = OUTMODE_MPEG2_FIFO, */
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.output_mode = OUTMODE_MPEG2_SERIAL,
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/* .output_mode = OUTMODE_MPEG2_PAR_GATED_CLK, */
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.output_mpeg2_in_188_bytes = 1,
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.agc_config_count = 1,
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.agc = &dib7070_agc_config,
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.bw = &dib7070_bw_config_12_mhz,
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.tuner_is_baseband = 1,
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.spur_protect = 1,
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.gpio_dir = 0xfcef, /* DIB7000P_GPIO_DEFAULT_DIRECTIONS, */
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.gpio_val = 0x0110, /* DIB7000P_GPIO_DEFAULT_VALUES, */
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.gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
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.hostbus_diversity = 1,
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};
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static int dvb_register(struct cx23885_tsport *port)
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static int dvb_register(struct cx23885_tsport *port)
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{
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{
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struct dib7000p_ops dib7000p_ops;
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struct dib7000p_ops dib7000p_ops;
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@ -993,6 +1094,30 @@ static int dvb_register(struct cx23885_tsport *port)
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}
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}
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break;
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break;
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}
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}
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case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2: {
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i2c_bus = &dev->i2c_bus[port->nr - 1];
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/* cxusb_ctrl_msg(adap->dev, CMD_DIGITAL, NULL, 0, NULL, 0); */
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/* cxusb_bluebird_gpio_pulse(adap->dev, 0x02, 1); */
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if (!dvb_attach(dib7000p_attach, &dib7000p_ops))
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return -ENODEV;
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if (dib7000p_ops.i2c_enumeration(&i2c_bus->i2c_adap, 1, 0x12, &dib7070p_dib7000p_config) < 0) {
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printk(KERN_WARNING "Unable to enumerate dib7000p\n");
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return -ENODEV;
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}
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fe0->dvb.frontend = dib7000p_ops.init(&i2c_bus->i2c_adap, 0x80, &dib7070p_dib7000p_config);
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if (fe0->dvb.frontend != NULL) {
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struct i2c_adapter *tun_i2c;
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fe0->dvb.frontend->sec_priv = kmalloc(sizeof(dib7000p_ops), GFP_KERNEL);
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memcpy(fe0->dvb.frontend->sec_priv, &dib7000p_ops, sizeof(dib7000p_ops));
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tun_i2c = dib7000p_ops.get_i2c_master(fe0->dvb.frontend, DIBX000_I2C_INTERFACE_TUNER, 1);
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if (!dvb_attach(dib0070_attach, fe0->dvb.frontend, tun_i2c, &dib7070p_dib0070_config))
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return -ENODEV;
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}
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break;
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}
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case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
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case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
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case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
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case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
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case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
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case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
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@ -97,6 +97,7 @@
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#define CX23885_BOARD_TBS_6980 41
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#define CX23885_BOARD_TBS_6980 41
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#define CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200 42
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#define CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200 42
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#define CX23885_BOARD_HAUPPAUGE_IMPACTVCBE 43
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#define CX23885_BOARD_HAUPPAUGE_IMPACTVCBE 43
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#define CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2 44
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#define GPIO_0 0x00000001
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#define GPIO_0 0x00000001
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#define GPIO_1 0x00000002
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#define GPIO_1 0x00000002
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