USB fixes for 4.5-rc3
Here are some USB fixes for 4.5-rc3. The usual, xhci fixes for reported issues, combined with some small gadget driver fixes, and a MAINTAINERS file update. All have been in linux-next with no reported issues. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iEYEABECAAYFAla205wACgkQMUfUDdst+ymVcACgksg9fcSsphvjo4ruxN79QrjW GaEAn3VmLc2WyLf13on9cXmBi8KrS+WY =sFPR -----END PGP SIGNATURE----- Merge tag 'usb-4.5-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb Pull USB fixes from Greg KH: "Here are some USB fixes for 4.5-rc3. The usual, xhci fixes for reported issues, combined with some small gadget driver fixes, and a MAINTAINERS file update. All have been in linux-next with no reported issues" * tag 'usb-4.5-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: xhci: harden xhci_find_next_ext_cap against device removal xhci: Fix list corruption in urb dequeue at host removal usb: host: xhci-plat: fix NULL pointer in probe for device tree case usb: xhci-mtk: fix AHB bus hang up caused by roothubs polling usb: xhci-mtk: fix bpkts value of LS/HS periodic eps not behind TT usb: xhci: apply XHCI_PME_STUCK_QUIRK to Intel Broxton-M platforms usb: xhci: set SSIC port unused only if xhci_suspend succeeds usb: xhci: add a quirk bit for ssic port unused usb: xhci: handle both SSIC ports in PME stuck quirk usb: dwc3: gadget: set the OTG flag in dwc3 gadget driver. Revert "xhci: don't finish a TD if we get a short-transfer event mid TD" MAINTAINERS: fix my email address usb: dwc2: Fix probe problem on bcm2835 Revert "usb: dwc2: Move reset into dwc2_get_hwparams()" usb: musb: ux500: Fix NULL pointer dereference at system PM usb: phy: mxs: declare variable with initialized value usb: phy: msm: fix error handling in probe.
This commit is contained in:
Linus Torvalds
commit
46df55ceea
10
MAINTAINERS
10
MAINTAINERS
@ -3450,7 +3450,7 @@ S: Maintained
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F: drivers/usb/dwc2/
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DESIGNWARE USB3 DRD IP DRIVER
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M: Felipe Balbi <balbi@ti.com>
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M: Felipe Balbi <balbi@kernel.org>
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L: linux-usb@vger.kernel.org
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L: linux-omap@vger.kernel.org
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T: git git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb.git
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@ -7362,7 +7362,7 @@ F: drivers/tty/isicom.c
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F: include/linux/isicom.h
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MUSB MULTIPOINT HIGH SPEED DUAL-ROLE CONTROLLER
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M: Felipe Balbi <balbi@ti.com>
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M: Felipe Balbi <balbi@kernel.org>
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L: linux-usb@vger.kernel.org
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T: git git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb.git
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S: Maintained
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@ -7931,7 +7931,7 @@ F: drivers/media/platform/omap3isp/
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F: drivers/staging/media/omap4iss/
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OMAP USB SUPPORT
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M: Felipe Balbi <balbi@ti.com>
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M: Felipe Balbi <balbi@kernel.org>
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L: linux-usb@vger.kernel.org
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L: linux-omap@vger.kernel.org
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T: git git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb.git
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@ -11314,7 +11314,7 @@ F: Documentation/usb/ehci.txt
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F: drivers/usb/host/ehci*
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USB GADGET/PERIPHERAL SUBSYSTEM
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M: Felipe Balbi <balbi@ti.com>
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M: Felipe Balbi <balbi@kernel.org>
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L: linux-usb@vger.kernel.org
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W: http://www.linux-usb.org/gadget
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T: git git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb.git
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@ -11390,7 +11390,7 @@ S: Maintained
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F: drivers/net/usb/pegasus.*
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USB PHY LAYER
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M: Felipe Balbi <balbi@ti.com>
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M: Felipe Balbi <balbi@kernel.org>
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L: linux-usb@vger.kernel.org
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T: git git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb.git
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S: Maintained
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@ -572,12 +572,6 @@ static bool dwc2_force_mode(struct dwc2_hsotg *hsotg, bool host)
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set = host ? GUSBCFG_FORCEHOSTMODE : GUSBCFG_FORCEDEVMODE;
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clear = host ? GUSBCFG_FORCEDEVMODE : GUSBCFG_FORCEHOSTMODE;
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/*
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* If the force mode bit is already set, don't set it.
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*/
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if ((gusbcfg & set) && !(gusbcfg & clear))
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return false;
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gusbcfg &= ~clear;
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gusbcfg |= set;
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dwc2_writel(gusbcfg, hsotg->regs + GUSBCFG);
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@ -3278,9 +3272,6 @@ static void dwc2_get_dev_hwparams(struct dwc2_hsotg *hsotg)
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/**
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* During device initialization, read various hardware configuration
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* registers and interpret the contents.
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*
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* This should be called during driver probe. It will perform a core
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* soft reset in order to get the reset values of the parameters.
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*/
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int dwc2_get_hwparams(struct dwc2_hsotg *hsotg)
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{
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@ -3288,7 +3279,6 @@ int dwc2_get_hwparams(struct dwc2_hsotg *hsotg)
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unsigned width;
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u32 hwcfg1, hwcfg2, hwcfg3, hwcfg4;
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u32 grxfsiz;
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int retval;
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/*
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* Attempt to ensure this device is really a DWC_otg Controller.
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@ -3308,10 +3298,6 @@ int dwc2_get_hwparams(struct dwc2_hsotg *hsotg)
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hw->snpsid >> 12 & 0xf, hw->snpsid >> 8 & 0xf,
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hw->snpsid >> 4 & 0xf, hw->snpsid & 0xf, hw->snpsid);
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retval = dwc2_core_reset(hsotg);
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if (retval)
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return retval;
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hwcfg1 = dwc2_readl(hsotg->regs + GHWCFG1);
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hwcfg2 = dwc2_readl(hsotg->regs + GHWCFG2);
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hwcfg3 = dwc2_readl(hsotg->regs + GHWCFG3);
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@ -530,7 +530,13 @@ static int dwc2_driver_probe(struct platform_device *dev)
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if (retval)
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return retval;
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/* Reset the controller and detect hardware config values */
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/*
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* Reset before dwc2_get_hwparams() then it could get power-on real
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* reset value form registers.
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*/
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dwc2_core_reset_and_force_dr_mode(hsotg);
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/* Detect config values from hardware */
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retval = dwc2_get_hwparams(hsotg);
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if (retval)
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goto error;
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@ -2789,6 +2789,7 @@ int dwc3_gadget_init(struct dwc3 *dwc)
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dwc->gadget.speed = USB_SPEED_UNKNOWN;
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dwc->gadget.sg_supported = true;
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dwc->gadget.name = "dwc3-gadget";
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dwc->gadget.is_otg = dwc->dr_mode == USB_DR_MODE_OTG;
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/*
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* FIXME We might be setting max_speed to <SUPER, however versions
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@ -112,12 +112,16 @@ static inline int xhci_find_next_ext_cap(void __iomem *base, u32 start, int id)
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offset = start;
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if (!start || start == XHCI_HCC_PARAMS_OFFSET) {
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val = readl(base + XHCI_HCC_PARAMS_OFFSET);
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if (val == ~0)
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return 0;
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offset = XHCI_HCC_EXT_CAPS(val) << 2;
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if (!offset)
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return 0;
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};
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do {
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val = readl(base + offset);
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if (val == ~0)
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return 0;
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if (XHCI_EXT_CAPS_ID(val) == id && offset != start)
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return offset;
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@ -275,8 +275,9 @@ static bool need_bw_sch(struct usb_host_endpoint *ep,
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return false;
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/*
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* for LS & FS periodic endpoints which its device don't attach
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* to TT are also ignored, root-hub will schedule them directly
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* for LS & FS periodic endpoints which its device is not behind
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* a TT are also ignored, root-hub will schedule them directly,
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* but need set @bpkts field of endpoint context to 1.
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*/
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if (is_fs_or_ls(speed) && !has_tt)
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return false;
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@ -339,8 +340,17 @@ int xhci_mtk_add_ep_quirk(struct usb_hcd *hcd, struct usb_device *udev,
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GET_MAX_PACKET(usb_endpoint_maxp(&ep->desc)),
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usb_endpoint_dir_in(&ep->desc), ep);
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if (!need_bw_sch(ep, udev->speed, slot_ctx->tt_info & TT_SLOT))
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if (!need_bw_sch(ep, udev->speed, slot_ctx->tt_info & TT_SLOT)) {
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/*
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* set @bpkts to 1 if it is LS or FS periodic endpoint, and its
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* device does not connected through an external HS hub
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*/
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if (usb_endpoint_xfer_int(&ep->desc)
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|| usb_endpoint_xfer_isoc(&ep->desc))
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ep_ctx->reserved[0] |= cpu_to_le32(EP_BPKTS(1));
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return 0;
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}
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bw_index = get_bw_index(xhci, udev, ep);
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sch_bw = &sch_array[bw_index];
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@ -696,9 +696,24 @@ static int xhci_mtk_remove(struct platform_device *dev)
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}
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#ifdef CONFIG_PM_SLEEP
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/*
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* if ip sleep fails, and all clocks are disabled, access register will hang
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* AHB bus, so stop polling roothubs to avoid regs access on bus suspend.
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* and no need to check whether ip sleep failed or not; this will cause SPM
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* to wake up system immediately after system suspend complete if ip sleep
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* fails, it is what we wanted.
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*/
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static int xhci_mtk_suspend(struct device *dev)
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{
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struct xhci_hcd_mtk *mtk = dev_get_drvdata(dev);
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struct usb_hcd *hcd = mtk->hcd;
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struct xhci_hcd *xhci = hcd_to_xhci(hcd);
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xhci_dbg(xhci, "%s: stop port polling\n", __func__);
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clear_bit(HCD_FLAG_POLL_RH, &hcd->flags);
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del_timer_sync(&hcd->rh_timer);
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clear_bit(HCD_FLAG_POLL_RH, &xhci->shared_hcd->flags);
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del_timer_sync(&xhci->shared_hcd->rh_timer);
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xhci_mtk_host_disable(mtk);
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xhci_mtk_phy_power_off(mtk);
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@ -710,11 +725,19 @@ static int xhci_mtk_suspend(struct device *dev)
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static int xhci_mtk_resume(struct device *dev)
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{
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struct xhci_hcd_mtk *mtk = dev_get_drvdata(dev);
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struct usb_hcd *hcd = mtk->hcd;
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struct xhci_hcd *xhci = hcd_to_xhci(hcd);
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usb_wakeup_disable(mtk);
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xhci_mtk_clks_enable(mtk);
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xhci_mtk_phy_power_on(mtk);
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xhci_mtk_host_enable(mtk);
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xhci_dbg(xhci, "%s: restart port polling\n", __func__);
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set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
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usb_hcd_poll_rh_status(hcd);
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set_bit(HCD_FLAG_POLL_RH, &xhci->shared_hcd->flags);
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usb_hcd_poll_rh_status(xhci->shared_hcd);
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return 0;
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}
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@ -28,7 +28,9 @@
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#include "xhci.h"
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#include "xhci-trace.h"
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#define PORT2_SSIC_CONFIG_REG2 0x883c
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#define SSIC_PORT_NUM 2
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#define SSIC_PORT_CFG2 0x880c
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#define SSIC_PORT_CFG2_OFFSET 0x30
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#define PROG_DONE (1 << 30)
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#define SSIC_PORT_UNUSED (1 << 31)
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@ -45,6 +47,7 @@
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#define PCI_DEVICE_ID_INTEL_CHERRYVIEW_XHCI 0x22b5
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#define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_H_XHCI 0xa12f
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#define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_XHCI 0x9d2f
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#define PCI_DEVICE_ID_INTEL_BROXTON_M_XHCI 0x0aa8
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static const char hcd_name[] = "xhci_hcd";
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@ -151,9 +154,14 @@ static void xhci_pci_quirks(struct device *dev, struct xhci_hcd *xhci)
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if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
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(pdev->device == PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_XHCI ||
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pdev->device == PCI_DEVICE_ID_INTEL_SUNRISEPOINT_H_XHCI ||
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pdev->device == PCI_DEVICE_ID_INTEL_CHERRYVIEW_XHCI)) {
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pdev->device == PCI_DEVICE_ID_INTEL_CHERRYVIEW_XHCI ||
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pdev->device == PCI_DEVICE_ID_INTEL_BROXTON_M_XHCI)) {
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xhci->quirks |= XHCI_PME_STUCK_QUIRK;
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}
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if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
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pdev->device == PCI_DEVICE_ID_INTEL_CHERRYVIEW_XHCI) {
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xhci->quirks |= XHCI_SSIC_PORT_UNUSED;
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}
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if (pdev->vendor == PCI_VENDOR_ID_ETRON &&
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pdev->device == PCI_DEVICE_ID_EJ168) {
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xhci->quirks |= XHCI_RESET_ON_RESUME;
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@ -312,22 +320,20 @@ static void xhci_pci_remove(struct pci_dev *dev)
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* SSIC PORT need to be marked as "unused" before putting xHCI
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* into D3. After D3 exit, the SSIC port need to be marked as "used".
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* Without this change, xHCI might not enter D3 state.
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* Make sure PME works on some Intel xHCI controllers by writing 1 to clear
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* the Internal PME flag bit in vendor specific PMCTRL register at offset 0x80a4
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*/
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static void xhci_pme_quirk(struct usb_hcd *hcd, bool suspend)
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static void xhci_ssic_port_unused_quirk(struct usb_hcd *hcd, bool suspend)
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{
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struct xhci_hcd *xhci = hcd_to_xhci(hcd);
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struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
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u32 val;
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void __iomem *reg;
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int i;
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if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
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pdev->device == PCI_DEVICE_ID_INTEL_CHERRYVIEW_XHCI) {
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for (i = 0; i < SSIC_PORT_NUM; i++) {
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reg = (void __iomem *) xhci->cap_regs +
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SSIC_PORT_CFG2 +
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i * SSIC_PORT_CFG2_OFFSET;
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reg = (void __iomem *) xhci->cap_regs + PORT2_SSIC_CONFIG_REG2;
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/* Notify SSIC that SSIC profile programming is not done */
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/* Notify SSIC that SSIC profile programming is not done. */
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val = readl(reg) & ~PROG_DONE;
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writel(val, reg);
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@ -344,6 +350,17 @@ static void xhci_pme_quirk(struct usb_hcd *hcd, bool suspend)
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writel(val, reg);
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readl(reg);
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}
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}
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/*
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* Make sure PME works on some Intel xHCI controllers by writing 1 to clear
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* the Internal PME flag bit in vendor specific PMCTRL register at offset 0x80a4
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*/
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static void xhci_pme_quirk(struct usb_hcd *hcd)
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{
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struct xhci_hcd *xhci = hcd_to_xhci(hcd);
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void __iomem *reg;
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u32 val;
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reg = (void __iomem *) xhci->cap_regs + 0x80a4;
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val = readl(reg);
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@ -355,6 +372,7 @@ static int xhci_pci_suspend(struct usb_hcd *hcd, bool do_wakeup)
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{
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struct xhci_hcd *xhci = hcd_to_xhci(hcd);
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struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
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int ret;
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/*
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* Systems with the TI redriver that loses port status change events
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@ -364,9 +382,16 @@ static int xhci_pci_suspend(struct usb_hcd *hcd, bool do_wakeup)
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pdev->no_d3cold = true;
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if (xhci->quirks & XHCI_PME_STUCK_QUIRK)
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xhci_pme_quirk(hcd, true);
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xhci_pme_quirk(hcd);
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return xhci_suspend(xhci, do_wakeup);
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if (xhci->quirks & XHCI_SSIC_PORT_UNUSED)
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xhci_ssic_port_unused_quirk(hcd, true);
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ret = xhci_suspend(xhci, do_wakeup);
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if (ret && (xhci->quirks & XHCI_SSIC_PORT_UNUSED))
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xhci_ssic_port_unused_quirk(hcd, false);
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return ret;
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}
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static int xhci_pci_resume(struct usb_hcd *hcd, bool hibernated)
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@ -396,8 +421,11 @@ static int xhci_pci_resume(struct usb_hcd *hcd, bool hibernated)
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if (pdev->vendor == PCI_VENDOR_ID_INTEL)
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usb_enable_intel_xhci_ports(pdev);
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if (xhci->quirks & XHCI_SSIC_PORT_UNUSED)
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xhci_ssic_port_unused_quirk(hcd, false);
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if (xhci->quirks & XHCI_PME_STUCK_QUIRK)
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xhci_pme_quirk(hcd, false);
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xhci_pme_quirk(hcd);
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retval = xhci_resume(xhci, hibernated);
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return retval;
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@ -184,7 +184,8 @@ static int xhci_plat_probe(struct platform_device *pdev)
|
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struct xhci_plat_priv *priv = hcd_to_xhci_priv(hcd);
|
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|
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/* Just copy data for now */
|
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*priv = *priv_match;
|
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if (priv_match)
|
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*priv = *priv_match;
|
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}
|
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|
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if (xhci_plat_type_is(hcd, XHCI_PLAT_TYPE_MARVELL_ARMADA)) {
|
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|
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@ -2193,10 +2193,6 @@ static int process_bulk_intr_td(struct xhci_hcd *xhci, struct xhci_td *td,
|
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}
|
||||
/* Fast path - was this the last TRB in the TD for this URB? */
|
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} else if (event_trb == td->last_trb) {
|
||||
if (td->urb_length_set && trb_comp_code == COMP_SHORT_TX)
|
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return finish_td(xhci, td, event_trb, event, ep,
|
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status, false);
|
||||
|
||||
if (EVENT_TRB_LEN(le32_to_cpu(event->transfer_len)) != 0) {
|
||||
td->urb->actual_length =
|
||||
td->urb->transfer_buffer_length -
|
||||
@ -2248,12 +2244,6 @@ static int process_bulk_intr_td(struct xhci_hcd *xhci, struct xhci_td *td,
|
||||
td->urb->actual_length +=
|
||||
TRB_LEN(le32_to_cpu(cur_trb->generic.field[2])) -
|
||||
EVENT_TRB_LEN(le32_to_cpu(event->transfer_len));
|
||||
|
||||
if (trb_comp_code == COMP_SHORT_TX) {
|
||||
xhci_dbg(xhci, "mid bulk/intr SP, wait for last TRB event\n");
|
||||
td->urb_length_set = true;
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
||||
return finish_td(xhci, td, event_trb, event, ep, status, false);
|
||||
|
||||
@ -1554,7 +1554,9 @@ int xhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
|
||||
xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
|
||||
"HW died, freeing TD.");
|
||||
urb_priv = urb->hcpriv;
|
||||
for (i = urb_priv->td_cnt; i < urb_priv->length; i++) {
|
||||
for (i = urb_priv->td_cnt;
|
||||
i < urb_priv->length && xhci->devs[urb->dev->slot_id];
|
||||
i++) {
|
||||
td = urb_priv->td[i];
|
||||
if (!list_empty(&td->td_list))
|
||||
list_del_init(&td->td_list);
|
||||
|
||||
@ -1631,6 +1631,7 @@ struct xhci_hcd {
|
||||
#define XHCI_BROKEN_STREAMS (1 << 19)
|
||||
#define XHCI_PME_STUCK_QUIRK (1 << 20)
|
||||
#define XHCI_MTK_HOST (1 << 21)
|
||||
#define XHCI_SSIC_PORT_UNUSED (1 << 22)
|
||||
unsigned int num_active_eps;
|
||||
unsigned int limit_active_eps;
|
||||
/* There are two roothubs to keep track of bus suspend info for */
|
||||
|
||||
@ -348,7 +348,9 @@ static int ux500_suspend(struct device *dev)
|
||||
struct ux500_glue *glue = dev_get_drvdata(dev);
|
||||
struct musb *musb = glue_to_musb(glue);
|
||||
|
||||
usb_phy_set_suspend(musb->xceiv, 1);
|
||||
if (musb)
|
||||
usb_phy_set_suspend(musb->xceiv, 1);
|
||||
|
||||
clk_disable_unprepare(glue->clk);
|
||||
|
||||
return 0;
|
||||
@ -366,7 +368,8 @@ static int ux500_resume(struct device *dev)
|
||||
return ret;
|
||||
}
|
||||
|
||||
usb_phy_set_suspend(musb->xceiv, 0);
|
||||
if (musb)
|
||||
usb_phy_set_suspend(musb->xceiv, 0);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -1599,6 +1599,8 @@ static int msm_otg_read_dt(struct platform_device *pdev, struct msm_otg *motg)
|
||||
&motg->id.nb);
|
||||
if (ret < 0) {
|
||||
dev_err(&pdev->dev, "register ID notifier failed\n");
|
||||
extcon_unregister_notifier(motg->vbus.extcon,
|
||||
EXTCON_USB, &motg->vbus.nb);
|
||||
return ret;
|
||||
}
|
||||
|
||||
@ -1660,15 +1662,6 @@ static int msm_otg_probe(struct platform_device *pdev)
|
||||
if (!motg)
|
||||
return -ENOMEM;
|
||||
|
||||
pdata = dev_get_platdata(&pdev->dev);
|
||||
if (!pdata) {
|
||||
if (!np)
|
||||
return -ENXIO;
|
||||
ret = msm_otg_read_dt(pdev, motg);
|
||||
if (ret)
|
||||
return ret;
|
||||
}
|
||||
|
||||
motg->phy.otg = devm_kzalloc(&pdev->dev, sizeof(struct usb_otg),
|
||||
GFP_KERNEL);
|
||||
if (!motg->phy.otg)
|
||||
@ -1710,6 +1703,15 @@ static int msm_otg_probe(struct platform_device *pdev)
|
||||
if (!motg->regs)
|
||||
return -ENOMEM;
|
||||
|
||||
pdata = dev_get_platdata(&pdev->dev);
|
||||
if (!pdata) {
|
||||
if (!np)
|
||||
return -ENXIO;
|
||||
ret = msm_otg_read_dt(pdev, motg);
|
||||
if (ret)
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*
|
||||
* NOTE: The PHYs can be multiplexed between the chipidea controller
|
||||
* and the dwc3 controller, using a single bit. It is important that
|
||||
@ -1717,8 +1719,10 @@ static int msm_otg_probe(struct platform_device *pdev)
|
||||
*/
|
||||
if (motg->phy_number) {
|
||||
phy_select = devm_ioremap_nocache(&pdev->dev, USB2_PHY_SEL, 4);
|
||||
if (!phy_select)
|
||||
return -ENOMEM;
|
||||
if (!phy_select) {
|
||||
ret = -ENOMEM;
|
||||
goto unregister_extcon;
|
||||
}
|
||||
/* Enable second PHY with the OTG port */
|
||||
writel(0x1, phy_select);
|
||||
}
|
||||
@ -1728,7 +1732,8 @@ static int msm_otg_probe(struct platform_device *pdev)
|
||||
motg->irq = platform_get_irq(pdev, 0);
|
||||
if (motg->irq < 0) {
|
||||
dev_err(&pdev->dev, "platform_get_irq failed\n");
|
||||
return motg->irq;
|
||||
ret = motg->irq;
|
||||
goto unregister_extcon;
|
||||
}
|
||||
|
||||
regs[0].supply = "vddcx";
|
||||
@ -1737,7 +1742,7 @@ static int msm_otg_probe(struct platform_device *pdev)
|
||||
|
||||
ret = devm_regulator_bulk_get(motg->phy.dev, ARRAY_SIZE(regs), regs);
|
||||
if (ret)
|
||||
return ret;
|
||||
goto unregister_extcon;
|
||||
|
||||
motg->vddcx = regs[0].consumer;
|
||||
motg->v3p3 = regs[1].consumer;
|
||||
@ -1834,6 +1839,12 @@ disable_clks:
|
||||
clk_disable_unprepare(motg->clk);
|
||||
if (!IS_ERR(motg->core_clk))
|
||||
clk_disable_unprepare(motg->core_clk);
|
||||
unregister_extcon:
|
||||
extcon_unregister_notifier(motg->id.extcon,
|
||||
EXTCON_USB_HOST, &motg->id.nb);
|
||||
extcon_unregister_notifier(motg->vbus.extcon,
|
||||
EXTCON_USB, &motg->vbus.nb);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
||||
@ -220,7 +220,7 @@ static int mxs_phy_hw_init(struct mxs_phy *mxs_phy)
|
||||
/* Return true if the vbus is there */
|
||||
static bool mxs_phy_get_vbus_status(struct mxs_phy *mxs_phy)
|
||||
{
|
||||
unsigned int vbus_value;
|
||||
unsigned int vbus_value = 0;
|
||||
|
||||
if (!mxs_phy->regmap_anatop)
|
||||
return false;
|
||||
|
||||
Loading…
Reference in New Issue
Block a user