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Merge branch 'pci/aer'

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- Mask reporting of Mask Replay Timer Timeout Correctable Errors in the
  bridge above Genesys GL975x SD host controllers; the errors are caused by
  a GL975x hardware defect and they may lead to AER interrupts that prevent
  system suspend (Kai-Heng Feng)

- Update URL of aer-inject tool (Kuppuswamy Sathyanarayanan)

* pci/aer:
  PCI/AER: Update aer-inject tool source URL
  PCI: Mask Replay Timer Timeout errors for Genesys GL975x SD host controller
This commit is contained in:
Bjorn Helgaas 2024-05-16 18:14:08 -05:00
commit 47807ab29f
4 changed files with 23 additions and 3 deletions
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2
Documentation/PCI/pcieaer-howto.rst
View File

@ -241,7 +241,7 @@ After reboot with new kernel or insert the module, a device file named
Then, you need a user space tool named aer-inject, which can be gotten
from:
https://git.kernel.org/cgit/linux/kernel/git/gong.chen/aer-inject.git/
https://github.com/intel/aer-inject.git
More information about aer-inject can be found in the document in
its source code.

2
drivers/pci/pcie/Kconfig
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@ -47,7 +47,7 @@ config PCIEAER_INJECT
error injection can fake almost all kinds of errors with the
help of a user space helper tool aer-inject, which can be
gotten from:
https://git.kernel.org/cgit/linux/kernel/git/gong.chen/aer-inject.git/
https://github.com/intel/aer-inject.git
config PCIEAER_CXL
bool "PCI Express CXL RAS support"

2
drivers/pci/pcie/aer_inject.c
View File

@ -6,7 +6,7 @@
* trigger various real hardware errors. Software based error
* injection can fake almost all kinds of errors with the help of a
* user space helper tool aer-inject, which can be gotten from:
* https://git.kernel.org/cgit/linux/kernel/git/gong.chen/aer-inject.git/
* https://github.com/intel/aer-inject.git
*
* Copyright 2009 Intel Corporation.
* Huang Ying <ying.huang@intel.com>

20
drivers/pci/quirks.c
View File

@ -6261,3 +6261,23 @@ static void pci_fixup_d3cold_delay_1sec(struct pci_dev *pdev)
pdev->d3cold_delay = 1000;
}
DECLARE_PCI_FIXUP_FINAL(0x5555, 0x0004, pci_fixup_d3cold_delay_1sec);
#ifdef CONFIG_PCIEAER
static void pci_mask_replay_timer_timeout(struct pci_dev *pdev)
{
struct pci_dev *parent = pci_upstream_bridge(pdev);
u32 val;
if (!parent || !parent->aer_cap)
return;
pci_info(parent, "mask Replay Timer Timeout Correctable Errors due to %s hardware defect",
pci_name(pdev));
pci_read_config_dword(parent, parent->aer_cap + PCI_ERR_COR_MASK, &val);
val |= PCI_ERR_COR_REP_TIMER;
pci_write_config_dword(parent, parent->aer_cap + PCI_ERR_COR_MASK, val);
}
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_GLI, 0x9750, pci_mask_replay_timer_timeout);
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_GLI, 0x9755, pci_mask_replay_timer_timeout);
#endif