arm64: dts: qcom: Enable RPMh Sleep stats
Add device node for Sleep stats driver which provides various low power mode stats on sc7180, sc7280, sm8150, sm8250 and sm8350. Also update the reg size of aoss_qmp device to 0x400. Cc: devicetree@vger.kernel.org Signed-off-by: Maulik Shah <mkshah@codeaurora.org> Tested-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1634107104-22197-5-git-send-email-mkshah@codeaurora.org
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@ -3219,13 +3219,18 @@
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aoss_qmp: power-controller@c300000 {
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compatible = "qcom,sc7180-aoss-qmp";
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reg = <0 0x0c300000 0 0x100000>;
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reg = <0 0x0c300000 0 0x400>;
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interrupts = <GIC_SPI 389 IRQ_TYPE_EDGE_RISING>;
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mboxes = <&apss_shared 0>;
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#clock-cells = <0>;
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};
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sram@c3f0000 {
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compatible = "qcom,rpmh-stats";
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reg = <0 0x0c3f0000 0 0x400>;
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};
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spmi_bus: spmi@c440000 {
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compatible = "qcom,spmi-pmic-arb";
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reg = <0 0x0c440000 0 0x1100>,
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@ -2637,7 +2637,7 @@
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aoss_qmp: power-controller@c300000 {
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compatible = "qcom,sc7280-aoss-qmp";
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reg = <0 0x0c300000 0 0x100000>;
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reg = <0 0x0c300000 0 0x400>;
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interrupts-extended = <&ipcc IPCC_CLIENT_AOP
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IPCC_MPROC_SIGNAL_GLINK_QMP
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IRQ_TYPE_EDGE_RISING>;
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@ -2647,6 +2647,11 @@
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#clock-cells = <0>;
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};
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sram@c3f0000 {
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compatible = "qcom,rpmh-stats";
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reg = <0 0x0c3f0000 0 0x400>;
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};
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spmi_bus: spmi@c440000 {
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compatible = "qcom,spmi-pmic-arb";
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reg = <0 0x0c440000 0 0x1100>,
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@ -3170,13 +3170,18 @@
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aoss_qmp: power-controller@c300000 {
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compatible = "qcom,sm8150-aoss-qmp";
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reg = <0x0 0x0c300000 0x0 0x100000>;
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reg = <0x0 0x0c300000 0x0 0x400>;
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interrupts = <GIC_SPI 389 IRQ_TYPE_EDGE_RISING>;
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mboxes = <&apss_shared 0>;
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#clock-cells = <0>;
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};
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sram@c3f0000 {
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compatible = "qcom,rpmh-stats";
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reg = <0 0x0c3f0000 0 0x400>;
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};
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tsens0: thermal-sensor@c263000 {
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compatible = "qcom,sm8150-tsens", "qcom,tsens-v2";
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reg = <0 0x0c263000 0 0x1ff>, /* TM */
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@ -2894,7 +2894,7 @@
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aoss_qmp: power-controller@c300000 {
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compatible = "qcom,sm8250-aoss-qmp";
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reg = <0 0x0c300000 0 0x100000>;
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reg = <0 0x0c300000 0 0x400>;
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interrupts-extended = <&ipcc IPCC_CLIENT_AOP
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IPCC_MPROC_SIGNAL_GLINK_QMP
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IRQ_TYPE_EDGE_RISING>;
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@ -2904,6 +2904,11 @@
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#clock-cells = <0>;
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};
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sram@c3f0000 {
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compatible = "qcom,rpmh-stats";
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reg = <0 0x0c3f0000 0 0x400>;
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};
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spmi_bus: spmi@c440000 {
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compatible = "qcom,spmi-pmic-arb";
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reg = <0x0 0x0c440000 0x0 0x0001100>,
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@ -788,7 +788,7 @@
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aoss_qmp: power-controller@c300000 {
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compatible = "qcom,sm8350-aoss-qmp";
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reg = <0 0x0c300000 0 0x100000>;
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reg = <0 0x0c300000 0 0x400>;
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interrupts-extended = <&ipcc IPCC_CLIENT_AOP IPCC_MPROC_SIGNAL_GLINK_QMP
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IRQ_TYPE_EDGE_RISING>;
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mboxes = <&ipcc IPCC_CLIENT_AOP IPCC_MPROC_SIGNAL_GLINK_QMP>;
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@ -796,6 +796,11 @@
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#clock-cells = <0>;
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};
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sram@c3f0000 {
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compatible = "qcom,rpmh-stats";
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reg = <0 0x0c3f0000 0 0x400>;
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};
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spmi_bus: spmi@c440000 {
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compatible = "qcom,spmi-pmic-arb";
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reg = <0x0 0xc440000 0x0 0x1100>,
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