KVM: x86: save one bit in ctxt->d
Alignments are exclusive, so 5 modes can be expressed in 3 bits. Signed-off-by: Radim Krčmář <rkrcmar@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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@ -158,9 +158,11 @@
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#define Src2GS (OpGS << Src2Shift)
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#define Src2Mask (OpMask << Src2Shift)
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#define Mmx ((u64)1 << 40) /* MMX Vector instruction */
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#define AlignMask ((u64)7 << 41)
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#define Aligned ((u64)1 << 41) /* Explicitly aligned (e.g. MOVDQA) */
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#define Unaligned ((u64)1 << 42) /* Explicitly unaligned (e.g. MOVDQU) */
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#define Avx ((u64)1 << 43) /* Advanced Vector Extensions */
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#define Unaligned ((u64)2 << 41) /* Explicitly unaligned (e.g. MOVDQU) */
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#define Avx ((u64)3 << 41) /* Advanced Vector Extensions */
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#define Aligned16 ((u64)4 << 41) /* Aligned to 16 byte boundary (e.g. FXSAVE) */
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#define Fastop ((u64)1 << 44) /* Use opcode::u.fastop */
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#define NoWrite ((u64)1 << 45) /* No writeback */
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#define SrcWrite ((u64)1 << 46) /* Write back src operand */
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@ -171,7 +173,6 @@
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#define NearBranch ((u64)1 << 52) /* Near branches */
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#define No16 ((u64)1 << 53) /* No 16 bit operand */
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#define IncSP ((u64)1 << 54) /* SP is incremented before ModRM calc */
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#define Aligned16 ((u64)1 << 55) /* Aligned to 16 byte boundary (e.g. FXSAVE) */
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#define DstXacc (DstAccLo | SrcAccHi | SrcWrite)
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@ -638,19 +639,21 @@ static void set_segment_selector(struct x86_emulate_ctxt *ctxt, u16 selector,
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*/
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static unsigned insn_alignment(struct x86_emulate_ctxt *ctxt, unsigned size)
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{
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u64 alignment = ctxt->d & AlignMask;
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if (likely(size < 16))
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return 1;
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if (ctxt->d & Aligned)
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return size;
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else if (ctxt->d & Unaligned)
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switch (alignment) {
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case Unaligned:
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case Avx:
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return 1;
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else if (ctxt->d & Avx)
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return 1;
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else if (ctxt->d & Aligned16)
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case Aligned16:
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return 16;
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else
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case Aligned:
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default:
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return size;
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}
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}
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static __always_inline int __linearize(struct x86_emulate_ctxt *ctxt,
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