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sh: Add support for SDK7780 board.

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Add support for Renesas Technology Europe SDK7780 board.

Signed-off-by: Nicholas Beck <nbeck@mpc-data.co.uk>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This commit is contained in:
Nicholas Beck 2008-01-23 12:50:51 +09:00 committed by Paul Mundt
parent 773c7bd694
commit 4862ec0739
11 changed files with 1801 additions and 0 deletions
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9
arch/sh/Kconfig
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@ -455,6 +455,14 @@ config SH_RTS7751R2D
Select RTS7751R2D if configuring for a Renesas Technology
Sales SH-Graphics board.
config SH_SDK7780
bool "SDK7780R3"
depends on CPU_SUBTYPE_SH7780
select SYS_SUPPORTS_PCI
help
Select SDK7780 if configuring for a Renesas SH7780 SDK7780R3
evaluation board.
config SH_HIGHLANDER
bool "Highlander"
depends on CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785
@ -520,6 +528,7 @@ endmenu
source "arch/sh/boards/renesas/rts7751r2d/Kconfig"
source "arch/sh/boards/renesas/r7780rp/Kconfig"
source "arch/sh/boards/renesas/sdk7780/Kconfig"
source "arch/sh/boards/magicpanelr2/Kconfig"
menu "Timer and clock configuration"

1
arch/sh/Makefile
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@ -116,6 +116,7 @@ machdir-$(CONFIG_SH_RTS7751R2D) += renesas/rts7751r2d
machdir-$(CONFIG_SH_7751_SYSTEMH) += renesas/systemh
machdir-$(CONFIG_SH_EDOSK7705) += renesas/edosk7705
machdir-$(CONFIG_SH_HIGHLANDER) += renesas/r7780rp
machdir-$(CONFIG_SH_SDK7780) += renesas/sdk7780
machdir-$(CONFIG_SH_7710VOIPGW) += renesas/sh7710voipgw
machdir-$(CONFIG_SH_X3PROTO) += renesas/x3proto
machdir-$(CONFIG_SH_SH4202_MICRODEV) += superh/microdev

23
arch/sh/boards/renesas/sdk7780/Kconfig Normal file
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@ -0,0 +1,23 @@
if SH_SDK7780
choice
prompt "SDK7780 options"
default SH_SDK7780_BASE
config SH_SDK7780_STANDALONE
bool "SDK7780 board support"
depends on CPU_SUBTYPE_SH7780
help
Selecting this option will enable support for the
standalone version of the SDK7780. If in doubt, say Y.
config SH_SDK7780_BASE
bool "SDK7780 with base-board support"
depends on CPU_SUBTYPE_SH7780
help
Selecting this option will enable support for the expansion
baseboard devices. If in doubt, say Y.
endchoice
endif

5
arch/sh/boards/renesas/sdk7780/Makefile Normal file
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@ -0,0 +1,5 @@
#
# Makefile for the SDK7780 specific parts of the kernel
#
obj-y := setup.o irq.o

46
arch/sh/boards/renesas/sdk7780/irq.c Normal file
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@ -0,0 +1,46 @@
/*
* linux/arch/sh/boards/renesas/sdk7780/irq.c
*
* Renesas Technology Europe SDK7780 Support.
*
* Copyright (C) 2008 Nicholas Beck <nbeck@mpc-data.co.uk>
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#include <linux/init.h>
#include <linux/irq.h>
#include <linux/io.h>
#include <asm/sdk7780.h>
enum {
UNUSED = 0,
/* board specific interrupt sources */
SMC91C111, /* Ethernet controller */
};
static struct intc_vect fpga_vectors[] __initdata = {
INTC_IRQ(SMC91C111, IRQ_ETHERNET),
};
static struct intc_mask_reg fpga_mask_registers[] __initdata = {
{ 0, FPGA_IRQ0MR, 16,
{ 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, SMC91C111, 0, 0, 0, 0 } },
};
static DECLARE_INTC_DESC(fpga_intc_desc, "sdk7780-irq", fpga_vectors,
NULL, fpga_mask_registers, NULL, NULL);
void __init init_sdk7780_IRQ(void)
{
printk(KERN_INFO "Using SDK7780 interrupt controller.\n");
ctrl_outw(0xFFFF, FPGA_IRQ0MR);
/* Setup IRL 0-3 */
ctrl_outw(0x0003, FPGA_IMSR);
plat_irq_setup_pins(IRQ_MODE_IRL3210);
register_intc_controller(&fpga_intc_desc);
}

109
arch/sh/boards/renesas/sdk7780/setup.c Normal file
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@ -0,0 +1,109 @@
/*
* arch/sh/boards/renesas/sdk7780/setup.c
*
* Renesas Solutions SH7780 SDK Support
* Copyright (C) 2008 Nicholas Beck <nbeck@mpc-data.co.uk>
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#include <linux/init.h>
#include <linux/types.h>
#include <linux/platform_device.h>
#include <linux/pata_platform.h>
#include <asm/machvec.h>
#include <asm/sdk7780.h>
#include <asm/heartbeat.h>
#include <asm/io.h>
#include <asm/addrspace.h>
#define GPIO_PECR 0xFFEA0008
//* Heartbeat */
static struct heartbeat_data heartbeat_data = {
.regsize = 16,
};
static struct resource heartbeat_resources[] = {
[0] = {
.start = PA_LED,
.end = PA_LED,
.flags = IORESOURCE_MEM,
},
};
static struct platform_device heartbeat_device = {
.name = "heartbeat",
.id = -1,
.dev = {
.platform_data = &heartbeat_data,
},
.num_resources = ARRAY_SIZE(heartbeat_resources),
.resource = heartbeat_resources,
};
/* SMC91x */
static struct resource smc91x_eth_resources[] = {
[0] = {
.name = "smc91x-regs" ,
.start = PA_LAN + 0x300,
.end = PA_LAN + 0x300 + 0x10 ,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = IRQ_ETHERNET,
.end = IRQ_ETHERNET,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device smc91x_eth_device = {
.name = "smc91x",
.id = 0,
.dev = {
.dma_mask = NULL, /* don't use dma */
.coherent_dma_mask = 0xffffffff,
},
.num_resources = ARRAY_SIZE(smc91x_eth_resources),
.resource = smc91x_eth_resources,
};
static struct platform_device *sdk7780_devices[] __initdata = {
&heartbeat_device,
&smc91x_eth_device,
};
static int __init sdk7780_devices_setup(void)
{
return platform_add_devices(sdk7780_devices,
ARRAY_SIZE(sdk7780_devices));
}
device_initcall(sdk7780_devices_setup);
static void __init sdk7780_setup(char **cmdline_p)
{
u16 ver = ctrl_inw(FPGA_FPVERR);
u16 dateStamp = ctrl_inw(FPGA_FPDATER);
printk(KERN_INFO "Renesas Technology Europe SDK7780 support.\n");
printk(KERN_INFO "Board version: %d (revision %d), "
"FPGA version: %d (revision %d), datestamp : %d\n",
(ver >> 12) & 0xf, (ver >> 8) & 0xf,
(ver >> 4) & 0xf, ver & 0xf,
dateStamp);
/* Setup pin mux'ing for PCIC */
ctrl_outw(0x0000, GPIO_PECR);
}
/*
* The Machine Vector
*/
static struct sh_machine_vector mv_se7780 __initmv = {
.mv_name = "Renesas SDK7780-R3" ,
.mv_setup = sdk7780_setup,
.mv_nr_irqs = 111,
.mv_init_irq = init_sdk7780_IRQ,
};

1394
arch/sh/configs/sdk7780_defconfig Normal file
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File diff suppressed because it is too large Load Diff

1
arch/sh/drivers/pci/Makefile
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@ -18,6 +18,7 @@ obj-$(CONFIG_SH_SECUREEDGE5410) += ops-snapgear.o
obj-$(CONFIG_SH_RTS7751R2D) += ops-rts7751r2d.o fixups-rts7751r2d.o
obj-$(CONFIG_SH_SH03) += ops-sh03.o fixups-sh03.o
obj-$(CONFIG_SH_HIGHLANDER) += ops-r7780rp.o fixups-r7780rp.o
obj-$(CONFIG_SH_SDK7780) += ops-sdk7780.o fixups-sdk7780.o
obj-$(CONFIG_SH_TITAN) += ops-titan.o
obj-$(CONFIG_SH_LANDISK) += ops-landisk.o
obj-$(CONFIG_SH_LBOX_RE2) += ops-lboxre2.o fixups-lboxre2.o

59
arch/sh/drivers/pci/fixups-sdk7780.c Normal file
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@ -0,0 +1,59 @@
/*
* arch/sh/drivers/pci/fixups-sdk7780.c
*
* PCI fixups for the SDK7780SE03
*
* Copyright (C) 2003 Lineo uSolutions, Inc.
* Copyright (C) 2004 - 2006 Paul Mundt
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#include <linux/pci.h>
#include "pci-sh4.h"
#include <asm/io.h>
int pci_fixup_pcic(void)
{
ctrl_outl(0x00000001, SH7780_PCI_VCR2);
/* Enable all interrupts, so we know what to fix */
pci_write_reg(0x0000C3FF, SH7780_PCIIMR);
pci_write_reg(0x0000380F, SH7780_PCIAINTM);
/* Set up standard PCI config registers */
pci_write_reg(0xFB00, SH7780_PCISTATUS);
pci_write_reg(0x0047, SH7780_PCICMD);
pci_write_reg(0x00, SH7780_PCIPIF);
pci_write_reg(0x00, SH7780_PCISUB);
pci_write_reg(0x06, SH7780_PCIBCC);
pci_write_reg(0x1912, SH7780_PCISVID);
pci_write_reg(0x0001, SH7780_PCISID);
pci_write_reg(0x08000000, SH7780_PCIMBAR0); /* PCI */
pci_write_reg(0x08000000, SH7780_PCILAR0); /* SHwy */
pci_write_reg(0x07F00001, SH7780_PCILSR); /* size 128M w/ MBAR */
pci_write_reg(0x00000000, SH7780_PCIMBAR1);
pci_write_reg(0x00000000, SH7780_PCILAR1);
pci_write_reg(0x00000000, SH7780_PCILSR1);
pci_write_reg(0xAB000801, SH7780_PCIIBAR);
/*
* Set the MBR so PCI address is one-to-one with window,
* meaning all calls go straight through... use ifdef to
* catch erroneous assumption.
*/
pci_write_reg(0xFD000000 , SH7780_PCIMBR0);
pci_write_reg(0x00FC0000 , SH7780_PCIMBMR0); /* 16M */
/* Set IOBR for window containing area specified in pci.h */
pci_write_reg(PCIBIOS_MIN_IO & ~(SH7780_PCI_IO_SIZE-1), SH7780_PCIIOBR);
pci_write_reg((SH7780_PCI_IO_SIZE-1) & (7 << 18), SH7780_PCIIOBMR);
pci_write_reg(0xA5000C01, SH7780_PCICR);
return 0;
}

73
arch/sh/drivers/pci/ops-sdk7780.c Normal file
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@ -0,0 +1,73 @@
/*
* linux/arch/sh/drivers/pci/ops-sdk7780.c
*
* Copyright (C) 2006 Nobuhiro Iwamatsu
*
* PCI initialization for the SDK7780SE03
*
* May be copied or modified under the terms of the GNU General Public
* License. See linux/COPYING for more information.
*/
#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/pci.h>
#include <asm/sdk7780.h>
#include <asm/io.h>
#include "pci-sh4.h"
/* IDSEL [16][17][18][19][20][21][22][23][24][25][26][27][28][29][30][31] */
static char sdk7780_irq_tab[4][16] __initdata = {
/* INTA */
{ 65, 68, 67, 68, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 },
/* INTB */
{ 66, 65, -1, 65, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 },
/* INTC */
{ 67, 66, -1, 66, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 },
/* INTD */
{ 68, 67, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 },
};
int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin)
{
return sdk7780_irq_tab[pin-1][slot];
}
static struct resource sdk7780_io_resource = {
.name = "SH7780_IO",
.start = SH7780_PCI_IO_BASE,
.end = SH7780_PCI_IO_BASE + SH7780_PCI_IO_SIZE - 1,
.flags = IORESOURCE_IO
};
static struct resource sdk7780_mem_resource = {
.name = "SH7780_mem",
.start = SH7780_PCI_MEMORY_BASE,
.end = SH7780_PCI_MEMORY_BASE + SH7780_PCI_MEM_SIZE - 1,
.flags = IORESOURCE_MEM
};
struct pci_channel board_pci_channels[] = {
{ &sh4_pci_ops, &sdk7780_io_resource, &sdk7780_mem_resource, 0, 0xff },
{ NULL, NULL, NULL, 0, 0 },
};
EXPORT_SYMBOL(board_pci_channels);
static struct sh4_pci_address_map sdk7780_pci_map = {
.window0 = {
.base = SH7780_CS2_BASE_ADDR,
.size = 0x04000000,
},
.window1 = {
.base = SH7780_CS3_BASE_ADDR,
.size = 0x04000000,
},
.flags = SH4_PCIC_NO_RESET,
};
int __init pcibios_init_platform(void)
{
printk(KERN_INFO "SH7780 PCI: Finished initializing PCI controller\n");
return sh7780_pcic_init(&sdk7780_pci_map);
}

81
include/asm-sh/sdk7780.h Normal file
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@ -0,0 +1,81 @@
#ifndef __ASM_SH_RENESAS_SDK7780_H
#define __ASM_SH_RENESAS_SDK7780_H
/*
* linux/include/asm-sh/sdk7780.h
*
* Renesas Solutions SH7780 SDK Support
* Copyright (C) 2008 Nicholas Beck <nbeck@mpc-data.co.uk>
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#include <asm/addrspace.h>
/* Box specific addresses. */
#define SE_AREA0_WIDTH 4 /* Area0: 32bit */
#define PA_ROM 0xa0000000 /* EPROM */
#define PA_ROM_SIZE 0x00400000 /* EPROM size 4M byte */
#define PA_FROM 0xa0800000 /* Flash-ROM */
#define PA_FROM_SIZE 0x00400000 /* Flash-ROM size 4M byte */
#define PA_EXT1 0xa4000000
#define PA_EXT1_SIZE 0x04000000
#define PA_SDRAM 0xa8000000 /* DDR-SDRAM(Area2/3) 128MB */
#define PA_SDRAM_SIZE 0x08000000
#define PA_EXT4 0xb0000000
#define PA_EXT4_SIZE 0x04000000
#define PA_EXT_USER PA_EXT4 /* User Expansion Space */
#define PA_PERIPHERAL PA_AREA5_IO
/* SRAM/Reserved */
#define PA_RESERVED (PA_PERIPHERAL + 0)
/* FPGA base address */
#define PA_FPGA (PA_PERIPHERAL + 0x01000000)
/* SMC LAN91C111 */
#define PA_LAN (PA_PERIPHERAL + 0x01800000)
#define FPGA_SRSTR (PA_FPGA + 0x000) /* System reset */
#define FPGA_IRQ0SR (PA_FPGA + 0x010) /* IRQ0 status */
#define FPGA_IRQ0MR (PA_FPGA + 0x020) /* IRQ0 mask */
#define FPGA_BDMR (PA_FPGA + 0x030) /* Board operating mode */
#define FPGA_INTT0PRTR (PA_FPGA + 0x040) /* Interrupt test mode0 port */
#define FPGA_INTT0SELR (PA_FPGA + 0x050) /* Int. test mode0 select */
#define FPGA_INTT1POLR (PA_FPGA + 0x060) /* Int. test mode0 polarity */
#define FPGA_NMIR (PA_FPGA + 0x070) /* NMI source */
#define FPGA_NMIMR (PA_FPGA + 0x080) /* NMI mask */
#define FPGA_IRQR (PA_FPGA + 0x090) /* IRQX source */
#define FPGA_IRQMR (PA_FPGA + 0x0A0) /* IRQX mask */
#define FPGA_SLEDR (PA_FPGA + 0x0B0) /* LED control */
#define PA_LED FPGA_SLEDR
#define FPGA_MAPSWR (PA_FPGA + 0x0C0) /* Map switch */
#define FPGA_FPVERR (PA_FPGA + 0x0D0) /* FPGA version */
#define FPGA_FPDATER (PA_FPGA + 0x0E0) /* FPGA date */
#define FPGA_RSE (PA_FPGA + 0x100) /* Reset source */
#define FPGA_EASR (PA_FPGA + 0x110) /* External area select */
#define FPGA_SPER (PA_FPGA + 0x120) /* Serial port enable */
#define FPGA_IMSR (PA_FPGA + 0x130) /* Interrupt mode select */
#define FPGA_PCIMR (PA_FPGA + 0x140) /* PCI Mode */
#define FPGA_DIPSWMR (PA_FPGA + 0x150) /* DIPSW monitor */
#define FPGA_FPODR (PA_FPGA + 0x160) /* Output port data */
#define FPGA_ATAESR (PA_FPGA + 0x170) /* ATA extended bus status */
#define FPGA_IRQPOLR (PA_FPGA + 0x180) /* IRQx polarity */
#define SDK7780_NR_IRL 15
/* IDE/ATA interrupt */
#define IRQ_CFCARD 14
/* SMC interrupt */
#define IRQ_ETHERNET 6
/* arch/sh/boards/renesas/sdk7780/irq.c */
void init_sdk7780_IRQ(void);
#define __IO_PREFIX sdk7780
#include <asm/io_generic.h>
#endif /* __ASM_SH_RENESAS_SDK7780_H */