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media: camss: csiphy: Set rate on csiX_phy clock on SDM630/660

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The SDM630/660 SoCs (and variants) have another clock source
for the PHY, which must be set to a rate that's equal or
greater than the CSI PHY timer clock: failing to do this
will produce PHY overflows when trying to get a stream from
a very high bandwidth camera sensor and outputting no frame
or a partial one.

Since I haven't found any usecase in which the csiX_phy
clock needs to be higher than the csiXphy_timer, let's just
set the same rate on both, which seems to work just perfect.

Signed-off-by: AngeloGioacchino Del Regno <kholk11@gmail.com>
Reviewed-by: Robert Foss <robert.foss@linaro.org>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
This commit is contained in:
AngeloGioacchino Del Regno 2020-10-22 19:47:06 +02:00 committed by Mauro Carvalho Chehab
parent e486781b74
commit 4863b93cfd
2 changed files with 20 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

22
drivers/media/platform/qcom/camss/camss-csiphy.c
View File

@ -113,9 +113,7 @@ static int csiphy_set_clock_rates(struct csiphy_device *csiphy)
for (i = 0; i < csiphy->nclocks; i++) {
struct camss_clock *clock = &csiphy->clock[i];
if (!strcmp(clock->name, "csiphy0_timer") ||
!strcmp(clock->name, "csiphy1_timer") ||
!strcmp(clock->name, "csiphy2_timer")) {
if (csiphy->rate_set[i]) {
u8 bpp = csiphy_get_bpp(csiphy->formats,
csiphy->nformats,
csiphy->fmt[MSM_CSIPHY_PAD_SINK].code);
@ -613,6 +611,13 @@ int msm_csiphy_subdev_init(struct camss *camss,
if (!csiphy->clock)
return -ENOMEM;
csiphy->rate_set = devm_kcalloc(dev,
csiphy->nclocks,
sizeof(*csiphy->rate_set),
GFP_KERNEL);
if (!csiphy->rate_set)
return -ENOMEM;
for (i = 0; i < csiphy->nclocks; i++) {
struct camss_clock *clock = &csiphy->clock[i];
@ -640,6 +645,17 @@ int msm_csiphy_subdev_init(struct camss *camss,
for (j = 0; j < clock->nfreqs; j++)
clock->freq[j] = res->clock_rate[i][j];
if (!strcmp(clock->name, "csiphy0_timer") ||
!strcmp(clock->name, "csiphy1_timer") ||
!strcmp(clock->name, "csiphy2_timer"))
csiphy->rate_set[i] = true;
if (camss->version == CAMSS_660 &&
(!strcmp(clock->name, "csi0_phy") ||
!strcmp(clock->name, "csi1_phy") ||
!strcmp(clock->name, "csi2_phy")))
csiphy->rate_set[i] = true;
}
return 0;

1
drivers/media/platform/qcom/camss/camss-csiphy.h
View File

@ -66,6 +66,7 @@ struct csiphy_device {
u32 irq;
char irq_name[30];
struct camss_clock *clock;
bool *rate_set;
int nclocks;
u32 timer_clk_rate;
struct csiphy_config cfg;