Merge branch 'x86/fpu' into x86/smap
Reason for merge:
x86/fpu changed the structure of some of the code that x86/smap
changes; mostly fpu-internal.h but also minor changes to the
signal code.
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Resolved Conflicts:
arch/x86/ia32/ia32_signal.c
arch/x86/include/asm/fpu-internal.h
arch/x86/kernel/signal.c
This commit is contained in:
H. Peter Anvin
@ -12,6 +12,7 @@
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#include <linux/kernel_stat.h>
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#include <linux/regset.h>
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#include <linux/compat.h>
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#include <linux/slab.h>
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#include <asm/asm.h>
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#include <asm/cpufeature.h>
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@ -20,43 +21,76 @@
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#include <asm/user.h>
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#include <asm/uaccess.h>
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#include <asm/xsave.h>
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#include <asm/smap.h>
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extern unsigned int sig_xstate_size;
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#ifdef CONFIG_X86_64
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# include <asm/sigcontext32.h>
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# include <asm/user32.h>
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int ia32_setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
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compat_sigset_t *set, struct pt_regs *regs);
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int ia32_setup_frame(int sig, struct k_sigaction *ka,
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compat_sigset_t *set, struct pt_regs *regs);
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#else
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# define user_i387_ia32_struct user_i387_struct
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# define user32_fxsr_struct user_fxsr_struct
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# define ia32_setup_frame __setup_frame
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# define ia32_setup_rt_frame __setup_rt_frame
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#endif
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extern unsigned int mxcsr_feature_mask;
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extern void fpu_init(void);
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extern void eager_fpu_init(void);
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DECLARE_PER_CPU(struct task_struct *, fpu_owner_task);
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extern void convert_from_fxsr(struct user_i387_ia32_struct *env,
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struct task_struct *tsk);
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extern void convert_to_fxsr(struct task_struct *tsk,
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const struct user_i387_ia32_struct *env);
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extern user_regset_active_fn fpregs_active, xfpregs_active;
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extern user_regset_get_fn fpregs_get, xfpregs_get, fpregs_soft_get,
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xstateregs_get;
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extern user_regset_set_fn fpregs_set, xfpregs_set, fpregs_soft_set,
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xstateregs_set;
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/*
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* xstateregs_active == fpregs_active. Please refer to the comment
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* at the definition of fpregs_active.
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*/
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#define xstateregs_active fpregs_active
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extern struct _fpx_sw_bytes fx_sw_reserved;
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#ifdef CONFIG_IA32_EMULATION
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extern unsigned int sig_xstate_ia32_size;
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extern struct _fpx_sw_bytes fx_sw_reserved_ia32;
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struct _fpstate_ia32;
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struct _xstate_ia32;
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extern int save_i387_xstate_ia32(void __user *buf);
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extern int restore_i387_xstate_ia32(void __user *buf);
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#endif
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#ifdef CONFIG_MATH_EMULATION
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# define HAVE_HWFP (boot_cpu_data.hard_math)
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extern void finit_soft_fpu(struct i387_soft_struct *soft);
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#else
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# define HAVE_HWFP 1
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static inline void finit_soft_fpu(struct i387_soft_struct *soft) {}
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#endif
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static inline int is_ia32_compat_frame(void)
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{
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return config_enabled(CONFIG_IA32_EMULATION) &&
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test_thread_flag(TIF_IA32);
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}
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static inline int is_ia32_frame(void)
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{
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return config_enabled(CONFIG_X86_32) || is_ia32_compat_frame();
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}
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static inline int is_x32_frame(void)
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{
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return config_enabled(CONFIG_X86_X32_ABI) && test_thread_flag(TIF_X32);
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}
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#define X87_FSW_ES (1 << 7) /* Exception Summary */
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static __always_inline __pure bool use_eager_fpu(void)
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{
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return static_cpu_has(X86_FEATURE_EAGER_FPU);
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}
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static __always_inline __pure bool use_xsaveopt(void)
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{
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return static_cpu_has(X86_FEATURE_XSAVEOPT);
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@ -72,6 +106,13 @@ static __always_inline __pure bool use_fxsr(void)
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return static_cpu_has(X86_FEATURE_FXSR);
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}
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static inline void fx_finit(struct i387_fxsave_struct *fx)
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{
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memset(fx, 0, xstate_size);
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fx->cwd = 0x37f;
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fx->mxcsr = MXCSR_DEFAULT;
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}
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extern void __sanitize_i387_state(struct task_struct *);
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static inline void sanitize_i387_state(struct task_struct *tsk)
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@ -81,133 +122,104 @@ static inline void sanitize_i387_state(struct task_struct *tsk)
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__sanitize_i387_state(tsk);
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}
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#ifdef CONFIG_X86_64
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static inline int fxrstor_checking(struct i387_fxsave_struct *fx)
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{
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int err;
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#define user_insn(insn, output, input...) \
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({ \
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int err; \
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asm volatile(ASM_STAC "\n" \
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"1:" #insn "\n\t" \
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"2: " ASM_CLAC "\n" \
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".section .fixup,\"ax\"\n" \
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"3: movl $-1,%[err]\n" \
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" jmp 2b\n" \
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".previous\n" \
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_ASM_EXTABLE(1b, 3b) \
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: [err] "=r" (err), output \
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: "0"(0), input); \
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err; \
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})
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/* See comment in fxsave() below. */
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#ifdef CONFIG_AS_FXSAVEQ
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asm volatile("1: fxrstorq %[fx]\n\t"
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"2:\n"
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".section .fixup,\"ax\"\n"
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"3: movl $-1,%[err]\n"
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" jmp 2b\n"
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".previous\n"
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_ASM_EXTABLE(1b, 3b)
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: [err] "=r" (err)
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: [fx] "m" (*fx), "0" (0));
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#else
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asm volatile("1: rex64/fxrstor (%[fx])\n\t"
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"2:\n"
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".section .fixup,\"ax\"\n"
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"3: movl $-1,%[err]\n"
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" jmp 2b\n"
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".previous\n"
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_ASM_EXTABLE(1b, 3b)
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: [err] "=r" (err)
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: [fx] "R" (fx), "m" (*fx), "0" (0));
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#endif
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return err;
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#define check_insn(insn, output, input...) \
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({ \
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int err; \
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asm volatile("1:" #insn "\n\t" \
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"2:\n" \
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".section .fixup,\"ax\"\n" \
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"3: movl $-1,%[err]\n" \
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" jmp 2b\n" \
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".previous\n" \
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_ASM_EXTABLE(1b, 3b) \
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: [err] "=r" (err), output \
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: "0"(0), input); \
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err; \
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})
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static inline int fsave_user(struct i387_fsave_struct __user *fx)
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{
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return user_insn(fnsave %[fx]; fwait, [fx] "=m" (*fx), "m" (*fx));
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}
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static inline int fxsave_user(struct i387_fxsave_struct __user *fx)
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{
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int err;
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if (config_enabled(CONFIG_X86_32))
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return user_insn(fxsave %[fx], [fx] "=m" (*fx), "m" (*fx));
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else if (config_enabled(CONFIG_AS_FXSAVEQ))
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return user_insn(fxsaveq %[fx], [fx] "=m" (*fx), "m" (*fx));
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/*
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* Clear the bytes not touched by the fxsave and reserved
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* for the SW usage.
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*/
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err = __clear_user(&fx->sw_reserved,
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sizeof(struct _fpx_sw_bytes));
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if (unlikely(err))
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return -EFAULT;
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/* See comment in fxsave() below. */
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#ifdef CONFIG_AS_FXSAVEQ
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asm volatile(ASM_STAC "\n"
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"1: fxsaveq %[fx]\n\t"
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"2: " ASM_CLAC "\n"
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".section .fixup,\"ax\"\n"
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"3: movl $-1,%[err]\n"
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" jmp 2b\n"
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".previous\n"
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_ASM_EXTABLE(1b, 3b)
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: [err] "=r" (err), [fx] "=m" (*fx)
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: "0" (0));
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#else
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asm volatile(ASM_STAC "\n"
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"1: rex64/fxsave (%[fx])\n\t"
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"2: " ASM_CLAC "\n"
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".section .fixup,\"ax\"\n"
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"3: movl $-1,%[err]\n"
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" jmp 2b\n"
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".previous\n"
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_ASM_EXTABLE(1b, 3b)
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: [err] "=r" (err), "=m" (*fx)
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: [fx] "R" (fx), "0" (0));
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#endif
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if (unlikely(err) &&
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__clear_user(fx, sizeof(struct i387_fxsave_struct)))
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err = -EFAULT;
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/* No need to clear here because the caller clears USED_MATH */
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return err;
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/* See comment in fpu_fxsave() below. */
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return user_insn(rex64/fxsave (%[fx]), "=m" (*fx), [fx] "R" (fx));
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}
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static inline void fpu_fxsave(struct fpu *fpu)
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{
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/* Using "rex64; fxsave %0" is broken because, if the memory operand
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uses any extended registers for addressing, a second REX prefix
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will be generated (to the assembler, rex64 followed by semicolon
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is a separate instruction), and hence the 64-bitness is lost. */
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#ifdef CONFIG_AS_FXSAVEQ
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/* Using "fxsaveq %0" would be the ideal choice, but is only supported
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starting with gas 2.16. */
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__asm__ __volatile__("fxsaveq %0"
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: "=m" (fpu->state->fxsave));
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#else
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/* Using, as a workaround, the properly prefixed form below isn't
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accepted by any binutils version so far released, complaining that
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the same type of prefix is used twice if an extended register is
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needed for addressing (fix submitted to mainline 2005-11-21).
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asm volatile("rex64/fxsave %0"
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: "=m" (fpu->state->fxsave));
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This, however, we can work around by forcing the compiler to select
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an addressing mode that doesn't require extended registers. */
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asm volatile("rex64/fxsave (%[fx])"
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: "=m" (fpu->state->fxsave)
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: [fx] "R" (&fpu->state->fxsave));
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#endif
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}
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#else /* CONFIG_X86_32 */
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/* perform fxrstor iff the processor has extended states, otherwise frstor */
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static inline int fxrstor_checking(struct i387_fxsave_struct *fx)
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{
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/*
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* The "nop" is needed to make the instructions the same
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* length.
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*/
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alternative_input(
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"nop ; frstor %1",
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"fxrstor %1",
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X86_FEATURE_FXSR,
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"m" (*fx));
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if (config_enabled(CONFIG_X86_32))
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return check_insn(fxrstor %[fx], "=m" (*fx), [fx] "m" (*fx));
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else if (config_enabled(CONFIG_AS_FXSAVEQ))
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return check_insn(fxrstorq %[fx], "=m" (*fx), [fx] "m" (*fx));
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return 0;
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/* See comment in fpu_fxsave() below. */
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return check_insn(rex64/fxrstor (%[fx]), "=m" (*fx), [fx] "R" (fx),
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"m" (*fx));
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}
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static inline int frstor_checking(struct i387_fsave_struct *fx)
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{
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return check_insn(frstor %[fx], "=m" (*fx), [fx] "m" (*fx));
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}
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static inline void fpu_fxsave(struct fpu *fpu)
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{
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asm volatile("fxsave %[fx]"
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: [fx] "=m" (fpu->state->fxsave));
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if (config_enabled(CONFIG_X86_32))
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asm volatile( "fxsave %[fx]" : [fx] "=m" (fpu->state->fxsave));
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else if (config_enabled(CONFIG_AS_FXSAVEQ))
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asm volatile("fxsaveq %0" : "=m" (fpu->state->fxsave));
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else {
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/* Using "rex64; fxsave %0" is broken because, if the memory
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* operand uses any extended registers for addressing, a second
|
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* REX prefix will be generated (to the assembler, rex64
|
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* followed by semicolon is a separate instruction), and hence
|
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* the 64-bitness is lost.
|
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*
|
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* Using "fxsaveq %0" would be the ideal choice, but is only
|
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* supported starting with gas 2.16.
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*
|
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* Using, as a workaround, the properly prefixed form below
|
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* isn't accepted by any binutils version so far released,
|
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* complaining that the same type of prefix is used twice if
|
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* an extended register is needed for addressing (fix submitted
|
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* to mainline 2005-11-21).
|
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*
|
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* asm volatile("rex64/fxsave %0" : "=m" (fpu->state->fxsave));
|
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*
|
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* This, however, we can work around by forcing the compiler to
|
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* select an addressing mode that doesn't require extended
|
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* registers.
|
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*/
|
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asm volatile( "rex64/fxsave (%[fx])"
|
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: "=m" (fpu->state->fxsave)
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: [fx] "R" (&fpu->state->fxsave));
|
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}
|
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}
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|
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#endif /* CONFIG_X86_64 */
|
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|
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/*
|
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* These must be called with preempt disabled. Returns
|
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* 'true' if the FPU state is still intact.
|
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@ -250,17 +262,14 @@ static inline int __save_init_fpu(struct task_struct *tsk)
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return fpu_save_init(&tsk->thread.fpu);
|
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}
|
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|
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static inline int fpu_fxrstor_checking(struct fpu *fpu)
|
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{
|
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return fxrstor_checking(&fpu->state->fxsave);
|
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}
|
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|
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static inline int fpu_restore_checking(struct fpu *fpu)
|
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{
|
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if (use_xsave())
|
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return fpu_xrstor_checking(fpu);
|
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return fpu_xrstor_checking(&fpu->state->xsave);
|
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else if (use_fxsr())
|
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return fxrstor_checking(&fpu->state->fxsave);
|
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else
|
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return fpu_fxrstor_checking(fpu);
|
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return frstor_checking(&fpu->state->fsave);
|
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}
|
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|
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static inline int restore_fpu_checking(struct task_struct *tsk)
|
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@ -312,15 +321,52 @@ static inline void __thread_set_has_fpu(struct task_struct *tsk)
|
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static inline void __thread_fpu_end(struct task_struct *tsk)
|
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{
|
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__thread_clear_has_fpu(tsk);
|
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stts();
|
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if (!use_eager_fpu())
|
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stts();
|
||||
}
|
||||
|
||||
static inline void __thread_fpu_begin(struct task_struct *tsk)
|
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{
|
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clts();
|
||||
if (!use_eager_fpu())
|
||||
clts();
|
||||
__thread_set_has_fpu(tsk);
|
||||
}
|
||||
|
||||
static inline void __drop_fpu(struct task_struct *tsk)
|
||||
{
|
||||
if (__thread_has_fpu(tsk)) {
|
||||
/* Ignore delayed exceptions from user space */
|
||||
asm volatile("1: fwait\n"
|
||||
"2:\n"
|
||||
_ASM_EXTABLE(1b, 2b));
|
||||
__thread_fpu_end(tsk);
|
||||
}
|
||||
}
|
||||
|
||||
static inline void drop_fpu(struct task_struct *tsk)
|
||||
{
|
||||
/*
|
||||
* Forget coprocessor state..
|
||||
*/
|
||||
preempt_disable();
|
||||
tsk->fpu_counter = 0;
|
||||
__drop_fpu(tsk);
|
||||
clear_used_math();
|
||||
preempt_enable();
|
||||
}
|
||||
|
||||
static inline void drop_init_fpu(struct task_struct *tsk)
|
||||
{
|
||||
if (!use_eager_fpu())
|
||||
drop_fpu(tsk);
|
||||
else {
|
||||
if (use_xsave())
|
||||
xrstor_state(init_xstate_buf, -1);
|
||||
else
|
||||
fxrstor_checking(&init_xstate_buf->i387);
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* FPU state switching for scheduling.
|
||||
*
|
||||
@ -354,7 +400,12 @@ static inline fpu_switch_t switch_fpu_prepare(struct task_struct *old, struct ta
|
||||
{
|
||||
fpu_switch_t fpu;
|
||||
|
||||
fpu.preload = tsk_used_math(new) && new->fpu_counter > 5;
|
||||
/*
|
||||
* If the task has used the math, pre-load the FPU on xsave processors
|
||||
* or if the past 5 consecutive context-switches used math.
|
||||
*/
|
||||
fpu.preload = tsk_used_math(new) && (use_eager_fpu() ||
|
||||
new->fpu_counter > 5);
|
||||
if (__thread_has_fpu(old)) {
|
||||
if (!__save_init_fpu(old))
|
||||
cpu = ~0;
|
||||
@ -366,14 +417,14 @@ static inline fpu_switch_t switch_fpu_prepare(struct task_struct *old, struct ta
|
||||
new->fpu_counter++;
|
||||
__thread_set_has_fpu(new);
|
||||
prefetch(new->thread.fpu.state);
|
||||
} else
|
||||
} else if (!use_eager_fpu())
|
||||
stts();
|
||||
} else {
|
||||
old->fpu_counter = 0;
|
||||
old->thread.fpu.last_cpu = ~0;
|
||||
if (fpu.preload) {
|
||||
new->fpu_counter++;
|
||||
if (fpu_lazy_restore(new, cpu))
|
||||
if (!use_eager_fpu() && fpu_lazy_restore(new, cpu))
|
||||
fpu.preload = 0;
|
||||
else
|
||||
prefetch(new->thread.fpu.state);
|
||||
@ -393,44 +444,40 @@ static inline void switch_fpu_finish(struct task_struct *new, fpu_switch_t fpu)
|
||||
{
|
||||
if (fpu.preload) {
|
||||
if (unlikely(restore_fpu_checking(new)))
|
||||
__thread_fpu_end(new);
|
||||
drop_init_fpu(new);
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* Signal frame handlers...
|
||||
*/
|
||||
extern int save_i387_xstate(void __user *buf);
|
||||
extern int restore_i387_xstate(void __user *buf);
|
||||
extern int save_xstate_sig(void __user *buf, void __user *fx, int size);
|
||||
extern int __restore_xstate_sig(void __user *buf, void __user *fx, int size);
|
||||
|
||||
static inline void __clear_fpu(struct task_struct *tsk)
|
||||
static inline int xstate_sigframe_size(void)
|
||||
{
|
||||
if (__thread_has_fpu(tsk)) {
|
||||
/* Ignore delayed exceptions from user space */
|
||||
asm volatile("1: fwait\n"
|
||||
"2:\n"
|
||||
_ASM_EXTABLE(1b, 2b));
|
||||
__thread_fpu_end(tsk);
|
||||
return use_xsave() ? xstate_size + FP_XSTATE_MAGIC2_SIZE : xstate_size;
|
||||
}
|
||||
|
||||
static inline int restore_xstate_sig(void __user *buf, int ia32_frame)
|
||||
{
|
||||
void __user *buf_fx = buf;
|
||||
int size = xstate_sigframe_size();
|
||||
|
||||
if (ia32_frame && use_fxsr()) {
|
||||
buf_fx = buf + sizeof(struct i387_fsave_struct);
|
||||
size += sizeof(struct i387_fsave_struct);
|
||||
}
|
||||
|
||||
return __restore_xstate_sig(buf, buf_fx, size);
|
||||
}
|
||||
|
||||
/*
|
||||
* The actual user_fpu_begin/end() functions
|
||||
* need to be preemption-safe.
|
||||
* Need to be preemption-safe.
|
||||
*
|
||||
* NOTE! user_fpu_end() must be used only after you
|
||||
* have saved the FP state, and user_fpu_begin() must
|
||||
* be used only immediately before restoring it.
|
||||
* These functions do not do any save/restore on
|
||||
* their own.
|
||||
* NOTE! user_fpu_begin() must be used only immediately before restoring
|
||||
* it. This function does not do any save/restore on their own.
|
||||
*/
|
||||
static inline void user_fpu_end(void)
|
||||
{
|
||||
preempt_disable();
|
||||
__thread_fpu_end(current);
|
||||
preempt_enable();
|
||||
}
|
||||
|
||||
static inline void user_fpu_begin(void)
|
||||
{
|
||||
preempt_disable();
|
||||
@ -439,25 +486,32 @@ static inline void user_fpu_begin(void)
|
||||
preempt_enable();
|
||||
}
|
||||
|
||||
static inline void __save_fpu(struct task_struct *tsk)
|
||||
{
|
||||
if (use_xsave())
|
||||
xsave_state(&tsk->thread.fpu.state->xsave, -1);
|
||||
else
|
||||
fpu_fxsave(&tsk->thread.fpu);
|
||||
}
|
||||
|
||||
/*
|
||||
* These disable preemption on their own and are safe
|
||||
*/
|
||||
static inline void save_init_fpu(struct task_struct *tsk)
|
||||
{
|
||||
WARN_ON_ONCE(!__thread_has_fpu(tsk));
|
||||
|
||||
if (use_eager_fpu()) {
|
||||
__save_fpu(tsk);
|
||||
return;
|
||||
}
|
||||
|
||||
preempt_disable();
|
||||
__save_init_fpu(tsk);
|
||||
__thread_fpu_end(tsk);
|
||||
preempt_enable();
|
||||
}
|
||||
|
||||
static inline void clear_fpu(struct task_struct *tsk)
|
||||
{
|
||||
preempt_disable();
|
||||
__clear_fpu(tsk);
|
||||
preempt_enable();
|
||||
}
|
||||
|
||||
/*
|
||||
* i387 state interaction
|
||||
*/
|
||||
@ -512,11 +566,34 @@ static inline void fpu_free(struct fpu *fpu)
|
||||
}
|
||||
}
|
||||
|
||||
static inline void fpu_copy(struct fpu *dst, struct fpu *src)
|
||||
static inline void fpu_copy(struct task_struct *dst, struct task_struct *src)
|
||||
{
|
||||
memcpy(dst->state, src->state, xstate_size);
|
||||
if (use_eager_fpu()) {
|
||||
memset(&dst->thread.fpu.state->xsave, 0, xstate_size);
|
||||
__save_fpu(dst);
|
||||
} else {
|
||||
struct fpu *dfpu = &dst->thread.fpu;
|
||||
struct fpu *sfpu = &src->thread.fpu;
|
||||
|
||||
unlazy_fpu(src);
|
||||
memcpy(dfpu->state, sfpu->state, xstate_size);
|
||||
}
|
||||
}
|
||||
|
||||
extern void fpu_finit(struct fpu *fpu);
|
||||
static inline unsigned long
|
||||
alloc_mathframe(unsigned long sp, int ia32_frame, unsigned long *buf_fx,
|
||||
unsigned long *size)
|
||||
{
|
||||
unsigned long frame_size = xstate_sigframe_size();
|
||||
|
||||
*buf_fx = sp = round_down(sp - frame_size, 64);
|
||||
if (ia32_frame && use_fxsr()) {
|
||||
frame_size += sizeof(struct i387_fsave_struct);
|
||||
sp -= sizeof(struct i387_fsave_struct);
|
||||
}
|
||||
|
||||
*size = frame_size;
|
||||
return sp;
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
Reference in New Issue
Block a user