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mips: mark const init data with __initconst instead of __initdata

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As long as there is no other non-const variable marked __initdata in the
same compilation unit it doesn't hurt. If there were one however
compilation would fail with

	error: $variablename causes a section type conflict

because a section containing const variables is marked read only and so
cannot contain non-const variables.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Cc: linux-mips@linux-mips.org
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Cc: kernel@pengutronix.de
Patchwork: https://patchwork.linux-mips.org/patch/3565/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Uwe Kleine-König 2012-07-19 09:11:16 +02:00 committed by Ralf Baechle
parent 5520e42690
commit 4a043d79dc
7 changed files with 9 additions and 9 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
arch/mips/bcm63xx/dev-pcmcia.c
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@ -79,11 +79,11 @@ static int __init config_pcmcia_cs(unsigned int cs,
return ret; return ret;
} }
static const __initdata struct { static const struct {
unsigned int cs; unsigned int cs;
unsigned int base; unsigned int base;
unsigned int size; unsigned int size;
} pcmcia_cs[3] = { } pcmcia_cs[3] __initconst = {
{ {
.cs = MPI_CS_PCMCIA_COMMON, .cs = MPI_CS_PCMCIA_COMMON,
.base = BCM_PCMCIA_COMMON_BASE_PA, .base = BCM_PCMCIA_COMMON_BASE_PA,

2
arch/mips/mti-malta/malta-setup.c
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@ -111,7 +111,7 @@ static void __init pci_clock_check(void)
unsigned int __iomem *jmpr_p = unsigned int __iomem *jmpr_p =
(unsigned int *) ioremap(MALTA_JMPRS_REG, sizeof(unsigned int)); (unsigned int *) ioremap(MALTA_JMPRS_REG, sizeof(unsigned int));
int jmpr = (__raw_readl(jmpr_p) >> 2) & 0x07; int jmpr = (__raw_readl(jmpr_p) >> 2) & 0x07;
static const int pciclocks[] __initdata = { static const int pciclocks[] __initconst = {
33, 20, 25, 30, 12, 16, 37, 10 33, 20, 25, 30, 12, 16, 37, 10
}; };
int pciclock = pciclocks[jmpr]; int pciclock = pciclocks[jmpr];

4
arch/mips/pci/fixup-mpc30x.c
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@ -22,13 +22,13 @@
#include <asm/vr41xx/mpc30x.h> #include <asm/vr41xx/mpc30x.h>
static const int internal_func_irqs[] __initdata = { static const int internal_func_irqs[] __initconst = {
VRC4173_CASCADE_IRQ, VRC4173_CASCADE_IRQ,
VRC4173_AC97_IRQ, VRC4173_AC97_IRQ,
VRC4173_USB_IRQ, VRC4173_USB_IRQ,
}; };
static const int irq_tab_mpc30x[] __initdata = { static const int irq_tab_mpc30x[] __initconst = {
[12] = VRC4173_PCMCIA1_IRQ, [12] = VRC4173_PCMCIA1_IRQ,
[13] = VRC4173_PCMCIA2_IRQ, [13] = VRC4173_PCMCIA2_IRQ,
[29] = MQ200_IRQ, [29] = MQ200_IRQ,

2
arch/mips/powertv/asic/asic-calliope.c
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@ -28,7 +28,7 @@
#define CALLIOPE_ADDR(x) (CALLIOPE_IO_BASE + (x)) #define CALLIOPE_ADDR(x) (CALLIOPE_IO_BASE + (x))
const struct register_map calliope_register_map __initdata = { const struct register_map calliope_register_map __initconst = {
.eic_slow0_strt_add = {.phys = CALLIOPE_ADDR(0x800000)}, .eic_slow0_strt_add = {.phys = CALLIOPE_ADDR(0x800000)},
.eic_cfg_bits = {.phys = CALLIOPE_ADDR(0x800038)}, .eic_cfg_bits = {.phys = CALLIOPE_ADDR(0x800038)},
.eic_ready_status = {.phys = CALLIOPE_ADDR(0x80004c)}, .eic_ready_status = {.phys = CALLIOPE_ADDR(0x80004c)},

2
arch/mips/powertv/asic/asic-cronus.c
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@ -28,7 +28,7 @@
#define CRONUS_ADDR(x) (CRONUS_IO_BASE + (x)) #define CRONUS_ADDR(x) (CRONUS_IO_BASE + (x))
const struct register_map cronus_register_map __initdata = { const struct register_map cronus_register_map __initconst = {
.eic_slow0_strt_add = {.phys = CRONUS_ADDR(0x000000)}, .eic_slow0_strt_add = {.phys = CRONUS_ADDR(0x000000)},
.eic_cfg_bits = {.phys = CRONUS_ADDR(0x000038)}, .eic_cfg_bits = {.phys = CRONUS_ADDR(0x000038)},
.eic_ready_status = {.phys = CRONUS_ADDR(0x00004C)}, .eic_ready_status = {.phys = CRONUS_ADDR(0x00004C)},

2
arch/mips/powertv/asic/asic-gaia.c
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@ -23,7 +23,7 @@
#include <linux/init.h> #include <linux/init.h>
#include <asm/mach-powertv/asic.h> #include <asm/mach-powertv/asic.h>
const struct register_map gaia_register_map __initdata = { const struct register_map gaia_register_map __initconst = {
.eic_slow0_strt_add = {.phys = GAIA_IO_BASE + 0x000000}, .eic_slow0_strt_add = {.phys = GAIA_IO_BASE + 0x000000},
.eic_cfg_bits = {.phys = GAIA_IO_BASE + 0x000038}, .eic_cfg_bits = {.phys = GAIA_IO_BASE + 0x000038},
.eic_ready_status = {.phys = GAIA_IO_BASE + 0x00004C}, .eic_ready_status = {.phys = GAIA_IO_BASE + 0x00004C},

2
arch/mips/powertv/asic/asic-zeus.c
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@ -28,7 +28,7 @@
#define ZEUS_ADDR(x) (ZEUS_IO_BASE + (x)) #define ZEUS_ADDR(x) (ZEUS_IO_BASE + (x))
const struct register_map zeus_register_map __initdata = { const struct register_map zeus_register_map __initconst = {
.eic_slow0_strt_add = {.phys = ZEUS_ADDR(0x000000)}, .eic_slow0_strt_add = {.phys = ZEUS_ADDR(0x000000)},
.eic_cfg_bits = {.phys = ZEUS_ADDR(0x000038)}, .eic_cfg_bits = {.phys = ZEUS_ADDR(0x000038)},
.eic_ready_status = {.phys = ZEUS_ADDR(0x00004c)}, .eic_ready_status = {.phys = ZEUS_ADDR(0x00004c)},