Merge patch series "Prepare for upstreaming Pixel 6 and 7 UFS support"
Bart Van Assche <bvanassche@acm.org> says: The patches in this series are a first step towards integrating support in the upstream kernel for the UFS controller in the Pixel 6 and 7. [mkp: resolve conflict with RPMB series] Link: https://lore.kernel.org/r/20221208234358.252031-1-bvanassche@acm.org Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
This commit is contained in:
Martin K. Petersen
commit
4a5bd1a928
@ -531,7 +531,7 @@ void ufshcd_print_trs(struct ufs_hba *hba, unsigned long bitmap, bool pr_prdt)
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prdt_length = le16_to_cpu(
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lrbp->utr_descriptor_ptr->prd_table_length);
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if (hba->quirks & UFSHCD_QUIRK_PRDT_BYTE_GRAN)
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prdt_length /= sizeof(struct ufshcd_sg_entry);
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prdt_length /= ufshcd_sg_entry_size(hba);
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dev_err(hba->dev,
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"UPIU[%d] - PRDT - %d entries phys@0x%llx\n",
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@ -540,7 +540,7 @@ void ufshcd_print_trs(struct ufs_hba *hba, unsigned long bitmap, bool pr_prdt)
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if (pr_prdt)
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ufshcd_hex_dump("UPIU PRDT: ", lrbp->ucd_prdt_ptr,
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sizeof(struct ufshcd_sg_entry) * prdt_length);
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ufshcd_sg_entry_size(hba) * prdt_length);
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}
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}
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@ -1124,6 +1124,12 @@ static u32 ufshcd_pending_cmds(struct ufs_hba *hba)
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return pending;
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}
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/*
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* Wait until all pending SCSI commands and TMFs have finished or the timeout
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* has expired.
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*
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* Return: 0 upon success; -EBUSY upon timeout.
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*/
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static int ufshcd_wait_for_doorbell_clr(struct ufs_hba *hba,
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u64 wait_timeout_us)
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{
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@ -1157,7 +1163,7 @@ static int ufshcd_wait_for_doorbell_clr(struct ufs_hba *hba,
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}
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spin_unlock_irqrestore(hba->host->host_lock, flags);
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schedule();
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io_schedule_timeout(msecs_to_jiffies(20));
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if (ktime_to_us(ktime_sub(ktime_get(), start)) >
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wait_timeout_us) {
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timeout = true;
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@ -1228,9 +1234,14 @@ static int ufshcd_scale_gear(struct ufs_hba *hba, bool scale_up)
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return ret;
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}
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static int ufshcd_clock_scaling_prepare(struct ufs_hba *hba)
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/*
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* Wait until all pending SCSI commands and TMFs have finished or the timeout
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* has expired.
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*
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* Return: 0 upon success; -EBUSY upon timeout.
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*/
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static int ufshcd_clock_scaling_prepare(struct ufs_hba *hba, u64 timeout_us)
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{
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#define DOORBELL_CLR_TOUT_US (1000 * 1000) /* 1 sec */
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int ret = 0;
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/*
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* make sure that there are no outstanding requests when
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@ -1240,7 +1251,7 @@ static int ufshcd_clock_scaling_prepare(struct ufs_hba *hba)
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down_write(&hba->clk_scaling_lock);
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if (!hba->clk_scaling.is_allowed ||
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ufshcd_wait_for_doorbell_clr(hba, DOORBELL_CLR_TOUT_US)) {
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ufshcd_wait_for_doorbell_clr(hba, timeout_us)) {
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ret = -EBUSY;
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up_write(&hba->clk_scaling_lock);
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ufshcd_scsi_unblock_requests(hba);
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@ -1278,7 +1289,7 @@ static int ufshcd_devfreq_scale(struct ufs_hba *hba, bool scale_up)
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int ret = 0;
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bool is_writelock = true;
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ret = ufshcd_clock_scaling_prepare(hba);
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ret = ufshcd_clock_scaling_prepare(hba, 1 * USEC_PER_SEC);
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if (ret)
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return ret;
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@ -2411,7 +2422,7 @@ int ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
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static void ufshcd_sgl_to_prdt(struct ufs_hba *hba, struct ufshcd_lrb *lrbp, int sg_entries,
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struct scatterlist *sg_list)
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{
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struct ufshcd_sg_entry *prd_table;
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struct ufshcd_sg_entry *prd;
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struct scatterlist *sg;
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int i;
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@ -2419,11 +2430,11 @@ static void ufshcd_sgl_to_prdt(struct ufs_hba *hba, struct ufshcd_lrb *lrbp, int
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if (hba->quirks & UFSHCD_QUIRK_PRDT_BYTE_GRAN)
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lrbp->utr_descriptor_ptr->prd_table_length =
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cpu_to_le16((sg_entries * sizeof(struct ufshcd_sg_entry)));
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cpu_to_le16(sg_entries * ufshcd_sg_entry_size(hba));
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else
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lrbp->utr_descriptor_ptr->prd_table_length = cpu_to_le16(sg_entries);
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prd_table = lrbp->ucd_prdt_ptr;
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prd = lrbp->ucd_prdt_ptr;
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for_each_sg(sg_list, sg, sg_entries, i) {
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const unsigned int len = sg_dma_len(sg);
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@ -2437,9 +2448,10 @@ static void ufshcd_sgl_to_prdt(struct ufs_hba *hba, struct ufshcd_lrb *lrbp, int
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* indicates 4 bytes, '7' indicates 8 bytes, etc."
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*/
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WARN_ONCE(len > 256 * 1024, "len = %#x\n", len);
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prd_table[i].size = cpu_to_le32(len - 1);
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prd_table[i].addr = cpu_to_le64(sg->dma_address);
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prd_table[i].reserved = 0;
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prd->size = cpu_to_le32(len - 1);
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prd->addr = cpu_to_le64(sg->dma_address);
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prd->reserved = 0;
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prd = (void *)prd + ufshcd_sg_entry_size(hba);
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}
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} else {
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lrbp->utr_descriptor_ptr->prd_table_length = 0;
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@ -2746,10 +2758,11 @@ static void ufshcd_map_queues(struct Scsi_Host *shost)
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static void ufshcd_init_lrb(struct ufs_hba *hba, struct ufshcd_lrb *lrb, int i)
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{
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struct utp_transfer_cmd_desc *cmd_descp = hba->ucdl_base_addr;
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struct utp_transfer_cmd_desc *cmd_descp = (void *)hba->ucdl_base_addr +
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i * sizeof_utp_transfer_cmd_desc(hba);
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struct utp_transfer_req_desc *utrdlp = hba->utrdl_base_addr;
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dma_addr_t cmd_desc_element_addr = hba->ucdl_dma_addr +
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i * sizeof(struct utp_transfer_cmd_desc);
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i * sizeof_utp_transfer_cmd_desc(hba);
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u16 response_offset = offsetof(struct utp_transfer_cmd_desc,
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response_upiu);
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u16 prdt_offset = offsetof(struct utp_transfer_cmd_desc, prd_table);
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@ -2757,11 +2770,11 @@ static void ufshcd_init_lrb(struct ufs_hba *hba, struct ufshcd_lrb *lrb, int i)
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lrb->utr_descriptor_ptr = utrdlp + i;
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lrb->utrd_dma_addr = hba->utrdl_dma_addr +
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i * sizeof(struct utp_transfer_req_desc);
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lrb->ucd_req_ptr = (struct utp_upiu_req *)(cmd_descp + i);
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lrb->ucd_req_ptr = (struct utp_upiu_req *)cmd_descp->command_upiu;
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lrb->ucd_req_dma_addr = cmd_desc_element_addr;
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lrb->ucd_rsp_ptr = (struct utp_upiu_rsp *)cmd_descp[i].response_upiu;
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lrb->ucd_rsp_ptr = (struct utp_upiu_rsp *)cmd_descp->response_upiu;
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lrb->ucd_rsp_dma_addr = cmd_desc_element_addr + response_offset;
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lrb->ucd_prdt_ptr = cmd_descp[i].prd_table;
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lrb->ucd_prdt_ptr = (struct ufshcd_sg_entry *)cmd_descp->prd_table;
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lrb->ucd_prdt_dma_addr = cmd_desc_element_addr + prdt_offset;
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}
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@ -3676,7 +3689,7 @@ static int ufshcd_memory_alloc(struct ufs_hba *hba)
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size_t utmrdl_size, utrdl_size, ucdl_size;
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/* Allocate memory for UTP command descriptors */
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ucdl_size = (sizeof(struct utp_transfer_cmd_desc) * hba->nutrs);
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ucdl_size = sizeof_utp_transfer_cmd_desc(hba) * hba->nutrs;
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hba->ucdl_base_addr = dmam_alloc_coherent(hba->dev,
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ucdl_size,
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&hba->ucdl_dma_addr,
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@ -3770,7 +3783,7 @@ static void ufshcd_host_memory_configure(struct ufs_hba *hba)
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prdt_offset =
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offsetof(struct utp_transfer_cmd_desc, prd_table);
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cmd_desc_size = sizeof(struct utp_transfer_cmd_desc);
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cmd_desc_size = sizeof_utp_transfer_cmd_desc(hba);
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cmd_desc_dma_addr = hba->ucdl_dma_addr;
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for (i = 0; i < hba->nutrs; i++) {
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@ -9766,6 +9779,7 @@ int ufshcd_alloc_host(struct device *dev, struct ufs_hba **hba_handle)
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hba->dev = dev;
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hba->dev_ref_clk_freq = REF_CLK_FREQ_INVAL;
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hba->nop_out_timeout = NOP_OUT_TIMEOUT;
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ufshcd_set_sg_entry_size(hba, sizeof(struct ufshcd_sg_entry));
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INIT_LIST_HEAD(&hba->clk_list_head);
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spin_lock_init(&hba->outstanding_lock);
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@ -10145,11 +10159,6 @@ static int __init ufshcd_core_init(void)
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{
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int ret;
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/* Verify that there are no gaps in struct utp_transfer_cmd_desc. */
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static_assert(sizeof(struct utp_transfer_cmd_desc) ==
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2 * ALIGNED_UPIU_SIZE +
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SG_ALL * sizeof(struct ufshcd_sg_entry));
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ufs_debugfs_init();
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ret = scsi_register_driver(&ufs_dev_wlun_template.gendrv);
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@ -124,3 +124,7 @@ config SCSI_UFS_EXYNOS
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Select this if you have UFS host controller on Samsung Exynos SoC.
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If unsure, say N.
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config SCSI_UFS_VARIABLE_SG_ENTRY_SIZE
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bool
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default y if SCSI_UFS_EXYNOS && SCSI_UFS_CRYPTO
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@ -755,6 +755,7 @@ struct ufs_hba_monitor {
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* @vops: pointer to variant specific operations
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* @vps: pointer to variant specific parameters
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* @priv: pointer to variant specific private data
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* @sg_entry_size: size of struct ufshcd_sg_entry (may include variant fields)
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* @irq: Irq number of the controller
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* @is_irq_enabled: whether or not the UFS controller interrupt is enabled.
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* @dev_ref_clk_freq: reference clock frequency
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@ -878,6 +879,9 @@ struct ufs_hba {
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const struct ufs_hba_variant_ops *vops;
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struct ufs_hba_variant_params *vps;
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void *priv;
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#ifdef CONFIG_SCSI_UFS_VARIABLE_SG_ENTRY_SIZE
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size_t sg_entry_size;
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#endif
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unsigned int irq;
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bool is_irq_enabled;
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enum ufs_ref_clk_freq dev_ref_clk_freq;
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@ -981,6 +985,32 @@ struct ufs_hba {
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bool complete_put;
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};
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#ifdef CONFIG_SCSI_UFS_VARIABLE_SG_ENTRY_SIZE
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static inline size_t ufshcd_sg_entry_size(const struct ufs_hba *hba)
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{
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return hba->sg_entry_size;
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}
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static inline void ufshcd_set_sg_entry_size(struct ufs_hba *hba, size_t sg_entry_size)
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{
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WARN_ON_ONCE(sg_entry_size < sizeof(struct ufshcd_sg_entry));
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hba->sg_entry_size = sg_entry_size;
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}
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#else
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static inline size_t ufshcd_sg_entry_size(const struct ufs_hba *hba)
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{
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return sizeof(struct ufshcd_sg_entry);
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}
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#define ufshcd_set_sg_entry_size(hba, sg_entry_size) \
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({ (void)(hba); BUILD_BUG_ON(sg_entry_size != sizeof(struct ufshcd_sg_entry)); })
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#endif
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static inline size_t sizeof_utp_transfer_cmd_desc(const struct ufs_hba *hba)
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{
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return sizeof(struct utp_transfer_cmd_desc) + SG_ALL * ufshcd_sg_entry_size(hba);
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}
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/* Returns true if clocks can be gated. Otherwise false */
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static inline bool ufshcd_is_clkgating_allowed(struct ufs_hba *hba)
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{
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@ -423,18 +423,23 @@ struct ufshcd_sg_entry {
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__le64 addr;
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__le32 reserved;
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__le32 size;
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/*
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* followed by variant-specific fields if
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* CONFIG_SCSI_UFS_VARIABLE_SG_ENTRY_SIZE has been defined.
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*/
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};
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/**
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* struct utp_transfer_cmd_desc - UTP Command Descriptor (UCD)
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* @command_upiu: Command UPIU Frame address
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* @response_upiu: Response UPIU Frame address
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* @prd_table: Physical Region Descriptor
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* @prd_table: Physical Region Descriptor: an array of SG_ALL struct
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* ufshcd_sg_entry's. Variant-specific fields may be present after each.
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*/
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struct utp_transfer_cmd_desc {
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u8 command_upiu[ALIGNED_UPIU_SIZE];
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u8 response_upiu[ALIGNED_UPIU_SIZE];
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struct ufshcd_sg_entry prd_table[SG_ALL];
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u8 prd_table[];
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};
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/**
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