ftrace/x86: Remove the complex ftrace NMI handling code
As ftrace function tracing would require modifying code that could be executed in NMI context, which is not stopped with stop_machine(), ftrace had to do a complex algorithm with various stages of setup and memory barriers to make it work. With the new breakpoint method, this is no longer required. The changes to the code can be done without any problem in NMI context, as well as without stop machine altogether. Remove the complex code as it is no longer needed. Also, a lot of the notrace annotations could be removed from the NMI code as it is now safe to trace them. With the exception of do_nmi itself, which does some special work to handle running in the debug stack. The breakpoint method can cause NMIs to double nest the debug stack if it's not setup properly, and that is done in do_nmi(), thus that function must not be traced. (Note the arch sh may want to do the same) Cc: Paul Mundt <lethal@linux-sh.org> Cc: H. Peter Anvin <hpa@zytor.com> Signed-off-by: Steven Rostedt <rostedt@goodmis.org>
This commit is contained in:
Steven Rostedt
Steven Rostedt
parent
08d636b6d4
commit
4a6d70c950
@ -40,7 +40,6 @@ config X86
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select HAVE_FUNCTION_GRAPH_TRACER
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select HAVE_FUNCTION_GRAPH_FP_TEST
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select HAVE_FUNCTION_TRACE_MCOUNT_TEST
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select HAVE_FTRACE_NMI_ENTER if DYNAMIC_FTRACE
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select HAVE_SYSCALL_TRACEPOINTS
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select HAVE_KVM
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select HAVE_ARCH_KGDB
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@ -27,38 +27,18 @@
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#include <asm/cacheflush.h>
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#include <asm/ftrace.h>
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#include <asm/nops.h>
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#include <asm/nmi.h>
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#ifdef CONFIG_DYNAMIC_FTRACE
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/*
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* modifying_code is set to notify NMIs that they need to use
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* memory barriers when entering or exiting. But we don't want
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* to burden NMIs with unnecessary memory barriers when code
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* modification is not being done (which is most of the time).
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*
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* A mutex is already held when ftrace_arch_code_modify_prepare
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* and post_process are called. No locks need to be taken here.
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*
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* Stop machine will make sure currently running NMIs are done
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* and new NMIs will see the updated variable before we need
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* to worry about NMIs doing memory barriers.
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*/
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static int modifying_code __read_mostly;
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static DEFINE_PER_CPU(int, save_modifying_code);
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int ftrace_arch_code_modify_prepare(void)
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{
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set_kernel_text_rw();
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set_all_modules_text_rw();
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modifying_code = 1;
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return 0;
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}
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int ftrace_arch_code_modify_post_process(void)
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{
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modifying_code = 0;
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set_all_modules_text_ro();
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set_kernel_text_ro();
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return 0;
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@ -91,134 +71,6 @@ static unsigned char *ftrace_call_replace(unsigned long ip, unsigned long addr)
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return calc.code;
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}
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/*
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* Modifying code must take extra care. On an SMP machine, if
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* the code being modified is also being executed on another CPU
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* that CPU will have undefined results and possibly take a GPF.
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* We use kstop_machine to stop other CPUS from exectuing code.
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* But this does not stop NMIs from happening. We still need
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* to protect against that. We separate out the modification of
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* the code to take care of this.
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*
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* Two buffers are added: An IP buffer and a "code" buffer.
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*
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* 1) Put the instruction pointer into the IP buffer
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* and the new code into the "code" buffer.
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* 2) Wait for any running NMIs to finish and set a flag that says
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* we are modifying code, it is done in an atomic operation.
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* 3) Write the code
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* 4) clear the flag.
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* 5) Wait for any running NMIs to finish.
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*
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* If an NMI is executed, the first thing it does is to call
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* "ftrace_nmi_enter". This will check if the flag is set to write
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* and if it is, it will write what is in the IP and "code" buffers.
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*
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* The trick is, it does not matter if everyone is writing the same
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* content to the code location. Also, if a CPU is executing code
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* it is OK to write to that code location if the contents being written
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* are the same as what exists.
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*/
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#define MOD_CODE_WRITE_FLAG (1 << 31) /* set when NMI should do the write */
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static atomic_t nmi_running = ATOMIC_INIT(0);
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static int mod_code_status; /* holds return value of text write */
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static void *mod_code_ip; /* holds the IP to write to */
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static const void *mod_code_newcode; /* holds the text to write to the IP */
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static unsigned nmi_wait_count;
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static atomic_t nmi_update_count = ATOMIC_INIT(0);
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int ftrace_arch_read_dyn_info(char *buf, int size)
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{
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int r;
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r = snprintf(buf, size, "%u %u",
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nmi_wait_count,
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atomic_read(&nmi_update_count));
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return r;
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}
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static void clear_mod_flag(void)
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{
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int old = atomic_read(&nmi_running);
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for (;;) {
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int new = old & ~MOD_CODE_WRITE_FLAG;
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if (old == new)
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break;
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old = atomic_cmpxchg(&nmi_running, old, new);
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}
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}
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static void ftrace_mod_code(void)
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{
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/*
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* Yes, more than one CPU process can be writing to mod_code_status.
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* (and the code itself)
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* But if one were to fail, then they all should, and if one were
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* to succeed, then they all should.
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*/
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mod_code_status = probe_kernel_write(mod_code_ip, mod_code_newcode,
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MCOUNT_INSN_SIZE);
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/* if we fail, then kill any new writers */
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if (mod_code_status)
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clear_mod_flag();
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}
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void ftrace_nmi_enter(void)
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{
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__this_cpu_write(save_modifying_code, modifying_code);
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if (!__this_cpu_read(save_modifying_code))
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return;
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if (atomic_inc_return(&nmi_running) & MOD_CODE_WRITE_FLAG) {
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smp_rmb();
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ftrace_mod_code();
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atomic_inc(&nmi_update_count);
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}
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/* Must have previous changes seen before executions */
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smp_mb();
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}
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void ftrace_nmi_exit(void)
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{
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if (!__this_cpu_read(save_modifying_code))
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return;
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/* Finish all executions before clearing nmi_running */
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smp_mb();
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atomic_dec(&nmi_running);
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}
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static void wait_for_nmi_and_set_mod_flag(void)
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{
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if (!atomic_cmpxchg(&nmi_running, 0, MOD_CODE_WRITE_FLAG))
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return;
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do {
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cpu_relax();
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} while (atomic_cmpxchg(&nmi_running, 0, MOD_CODE_WRITE_FLAG));
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nmi_wait_count++;
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}
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static void wait_for_nmi(void)
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{
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if (!atomic_read(&nmi_running))
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return;
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do {
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cpu_relax();
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} while (atomic_read(&nmi_running));
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nmi_wait_count++;
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}
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static inline int
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within(unsigned long addr, unsigned long start, unsigned long end)
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{
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@ -239,26 +91,7 @@ do_ftrace_mod_code(unsigned long ip, const void *new_code)
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if (within(ip, (unsigned long)_text, (unsigned long)_etext))
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ip = (unsigned long)__va(__pa(ip));
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mod_code_ip = (void *)ip;
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mod_code_newcode = new_code;
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/* The buffers need to be visible before we let NMIs write them */
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smp_mb();
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wait_for_nmi_and_set_mod_flag();
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/* Make sure all running NMIs have finished before we write the code */
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smp_mb();
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ftrace_mod_code();
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/* Make sure the write happens before clearing the bit */
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smp_mb();
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clear_mod_flag();
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wait_for_nmi();
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return mod_code_status;
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return probe_kernel_write((void *)ip, new_code, MCOUNT_INSN_SIZE);
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}
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static const unsigned char *ftrace_nop_replace(void)
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@ -84,7 +84,7 @@ __setup("unknown_nmi_panic", setup_unknown_nmi_panic);
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#define nmi_to_desc(type) (&nmi_desc[type])
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static int notrace __kprobes nmi_handle(unsigned int type, struct pt_regs *regs, bool b2b)
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static int __kprobes nmi_handle(unsigned int type, struct pt_regs *regs, bool b2b)
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{
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struct nmi_desc *desc = nmi_to_desc(type);
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struct nmiaction *a;
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@ -209,7 +209,7 @@ void unregister_nmi_handler(unsigned int type, const char *name)
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EXPORT_SYMBOL_GPL(unregister_nmi_handler);
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static notrace __kprobes void
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static __kprobes void
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pci_serr_error(unsigned char reason, struct pt_regs *regs)
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{
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pr_emerg("NMI: PCI system error (SERR) for reason %02x on CPU %d.\n",
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@ -236,7 +236,7 @@ pci_serr_error(unsigned char reason, struct pt_regs *regs)
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outb(reason, NMI_REASON_PORT);
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}
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static notrace __kprobes void
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static __kprobes void
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io_check_error(unsigned char reason, struct pt_regs *regs)
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{
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unsigned long i;
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@ -263,7 +263,7 @@ io_check_error(unsigned char reason, struct pt_regs *regs)
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outb(reason, NMI_REASON_PORT);
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}
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static notrace __kprobes void
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static __kprobes void
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unknown_nmi_error(unsigned char reason, struct pt_regs *regs)
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{
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int handled;
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@ -305,7 +305,7 @@ unknown_nmi_error(unsigned char reason, struct pt_regs *regs)
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static DEFINE_PER_CPU(bool, swallow_nmi);
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static DEFINE_PER_CPU(unsigned long, last_nmi_rip);
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static notrace __kprobes void default_do_nmi(struct pt_regs *regs)
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static __kprobes void default_do_nmi(struct pt_regs *regs)
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{
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unsigned char reason = 0;
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int handled;
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