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drm/i915/kbl: Add WaDisableGamClockGating

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According to bspec we need to disable gam unit clock gating on
on kbl revids A0 and B0.

References: HSD#2226858, HSD#1944358
Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1465309159-30531-14-git-send-email-mika.kuoppala@intel.com
(cherry picked from commit 8aeb7f624f)
Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
This commit is contained in:
Mika Kuoppala 2016-06-07 17:19:05 +03:00 committed by Mika Kuoppala
parent 11b283412e
commit 4ac4199434
2 changed files with 6 additions and 0 deletions
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1
drivers/gpu/drm/i915/i915_reg.h
View File

@ -6926,6 +6926,7 @@ enum skl_disp_power_wells {
#define EDRAM_SETS_IDX(cap) (((cap) >> 8) & 0x3)
#define GEN6_UCGCTL1 _MMIO(0x9400)
# define GEN6_GAMUNIT_CLOCK_GATE_DISABLE (1 << 22)
# define GEN6_EU_TCUNIT_CLOCK_GATE_DISABLE (1 << 16)
# define GEN6_BLBUNIT_CLOCK_GATE_DISABLE (1 << 5)
# define GEN6_CSUNIT_CLOCK_GATE_DISABLE (1 << 7)

5
drivers/gpu/drm/i915/intel_pm.c
View File

@ -6722,6 +6722,11 @@ static void kabylake_init_clock_gating(struct drm_device *dev)
if (IS_KBL_REVID(dev_priv, 0, KBL_REVID_B0))
I915_WRITE(GEN8_UCGCTL6, I915_READ(GEN8_UCGCTL6) |
GEN8_SDEUNIT_CLOCK_GATE_DISABLE);
/* WaDisableGamClockGating:kbl */
if (IS_KBL_REVID(dev_priv, 0, KBL_REVID_B0))
I915_WRITE(GEN6_UCGCTL1, I915_READ(GEN6_UCGCTL1) |
GEN6_GAMUNIT_CLOCK_GATE_DISABLE);
}
static void skylake_init_clock_gating(struct drm_device *dev)