RISC-V: Show CPU ID and Hart ID separately in /proc/cpuinfo
Currently, /proc/cpuinfo show logical CPU ID as Hart ID which is in-correct. This patch shows CPU ID and Hart ID separately in /proc/cpuinfo using cpuid_to_hardid_map(). With this patch, contents of /proc/cpuinfo looks as follows: processor : 0 hart : 1 isa : rv64imafdc mmu : sv48 processor : 1 hart : 0 isa : rv64imafdc mmu : sv48 processor : 2 hart : 2 isa : rv64imafdc mmu : sv48 processor : 3 hart : 3 isa : rv64imafdc mmu : sv48 Signed-off-by: Anup Patel <anup@brainfault.org> Signed-off-by: Atish Patra <atish.patra@wdc.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
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@ -81,7 +81,7 @@ static void print_isa(struct seq_file *f, const char *orig_isa)
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#endif
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/* Print the base ISA, as we already know it's legal. */
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seq_puts(f, "isa\t: ");
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seq_puts(f, "isa\t\t: ");
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seq_write(f, isa, 5);
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isa += 5;
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@ -96,6 +96,7 @@ static void print_isa(struct seq_file *f, const char *orig_isa)
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isa++;
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}
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}
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seq_puts(f, "\n");
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/*
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* If we were given an unsupported ISA in the device tree then print
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@ -116,7 +117,7 @@ static void print_mmu(struct seq_file *f, const char *mmu_type)
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return;
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#endif
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seq_printf(f, "mmu\t: %s\n", mmu_type+6);
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seq_printf(f, "mmu\t\t: %s\n", mmu_type+6);
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}
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static void *c_start(struct seq_file *m, loff_t *pos)
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@ -144,14 +145,15 @@ static int c_show(struct seq_file *m, void *v)
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NULL);
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const char *compat, *isa, *mmu;
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seq_printf(m, "hart\t: %lu\n", cpu_id);
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seq_printf(m, "processor\t: %lu\n", cpu_id);
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seq_printf(m, "hart\t\t: %lu\n", cpuid_to_hartid_map(cpu_id));
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if (!of_property_read_string(node, "riscv,isa", &isa))
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print_isa(m, isa);
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if (!of_property_read_string(node, "mmu-type", &mmu))
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print_mmu(m, mmu);
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if (!of_property_read_string(node, "compatible", &compat)
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&& strcmp(compat, "riscv"))
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seq_printf(m, "uarch\t: %s\n", compat);
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seq_printf(m, "uarch\t\t: %s\n", compat);
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seq_puts(m, "\n");
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return 0;
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