[POWERPC] Add mpc7448hpc2 device tree source file
This patch adds the mpc7448hpc2 device tree source file. Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
This commit is contained in:
Zang Roy-r61911
Paul Mackerras
parent
1b9a93eb46
commit
4b3afca934
190
arch/powerpc/boot/dts/mpc7448hpc2.dts
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190
arch/powerpc/boot/dts/mpc7448hpc2.dts
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/*
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* MPC7448HPC2 (Taiga) board Device Tree Source
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*
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* Copyright 2006 Freescale Semiconductor Inc.
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* 2006 Roy Zang <Roy Zang at freescale.com>.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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/ {
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model = "mpc7448hpc2";
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compatible = "mpc74xx";
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#address-cells = <1>;
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#size-cells = <1>;
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linux,phandle = <100>;
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cpus {
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#cpus = <1>;
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#address-cells = <1>;
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#size-cells =<0>;
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linux,phandle = <200>;
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PowerPC,7448@0 {
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device_type = "cpu";
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reg = <0>;
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d-cache-line-size = <20>; // 32 bytes
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i-cache-line-size = <20>; // 32 bytes
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d-cache-size = <8000>; // L1, 32K bytes
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i-cache-size = <8000>; // L1, 32K bytes
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timebase-frequency = <0>; // 33 MHz, from uboot
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clock-frequency = <0>; // From U-Boot
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bus-frequency = <0>; // From U-Boot
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32-bit;
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linux,phandle = <201>;
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linux,boot-cpu;
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};
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};
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memory {
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device_type = "memory";
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linux,phandle = <300>;
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reg = <00000000 20000000 // DDR2 512M at 0
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>;
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};
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tsi108@c0000000 {
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#address-cells = <1>;
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#size-cells = <1>;
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#interrupt-cells = <2>;
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device_type = "tsi-bridge";
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ranges = <00000000 c0000000 00010000>;
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reg = <c0000000 00010000>;
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bus-frequency = <0>;
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i2c@7000 {
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interrupt-parent = <7400>;
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interrupts = <E 0>;
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reg = <7000 400>;
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device_type = "i2c";
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compatible = "tsi-i2c";
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};
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mdio@6000 {
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device_type = "mdio";
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compatible = "tsi-ethernet";
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ethernet-phy@6000 {
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linux,phandle = <6000>;
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interrupt-parent = <7400>;
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interrupts = <2 1>;
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reg = <6000 50>;
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phy-id = <8>;
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device_type = "ethernet-phy";
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};
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ethernet-phy@6400 {
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linux,phandle = <6400>;
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interrupt-parent = <7400>;
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interrupts = <2 1>;
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reg = <6000 50>;
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phy-id = <9>;
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device_type = "ethernet-phy";
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};
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};
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ethernet@6200 {
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#size-cells = <0>;
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device_type = "network";
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model = "TSI-ETH";
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compatible = "tsi-ethernet";
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reg = <6000 200>;
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address = [ 00 06 D2 00 00 01 ];
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interrupts = <10 2>;
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interrupt-parent = <7400>;
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phy-handle = <6000>;
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};
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ethernet@6600 {
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#address-cells = <1>;
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#size-cells = <0>;
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device_type = "network";
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model = "TSI-ETH";
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compatible = "tsi-ethernet";
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reg = <6400 200>;
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address = [ 00 06 D2 00 00 02 ];
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interrupts = <11 2>;
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interrupt-parent = <7400>;
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phy-handle = <6400>;
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};
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serial@7808 {
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device_type = "serial";
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compatible = "ns16550";
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reg = <7808 200>;
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clock-frequency = <3f6b5a00>;
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interrupts = <c 0>;
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interrupt-parent = <7400>;
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};
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serial@7c08 {
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device_type = "serial";
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compatible = "ns16550";
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reg = <7c08 200>;
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clock-frequency = <3f6b5a00>;
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interrupts = <d 0>;
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interrupt-parent = <7400>;
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};
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pic@7400 {
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linux,phandle = <7400>;
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clock-frequency = <0>;
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interrupt-controller;
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#address-cells = <0>;
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#interrupt-cells = <2>;
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reg = <7400 400>;
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built-in;
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compatible = "chrp,open-pic";
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device_type = "open-pic";
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big-endian;
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};
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pci@1000 {
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compatible = "tsi10x";
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device_type = "pci";
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linux,phandle = <1000>;
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#interrupt-cells = <1>;
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#size-cells = <2>;
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#address-cells = <3>;
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reg = <1000 1000>;
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bus-range = <0 0>;
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ranges = <02000000 0 e0000000 e0000000 0 1A000000
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01000000 0 00000000 fa000000 0 00010000>;
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clock-frequency = <7f28154>;
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interrupt-parent = <7400>;
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interrupts = <17 2>;
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interrupt-map-mask = <f800 0 0 7>;
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interrupt-map = <
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/* IDSEL 0x11 */
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0800 0 0 1 7400 24 0
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0800 0 0 2 7400 25 0
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0800 0 0 3 7400 26 0
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0800 0 0 4 7400 27 0
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/* IDSEL 0x12 */
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1000 0 0 1 7400 25 0
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1000 0 0 2 7400 26 0
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1000 0 0 3 7400 27 0
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1000 0 0 4 7400 24 0
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/* IDSEL 0x13 */
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1800 0 0 1 7400 26 0
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1800 0 0 2 7400 27 0
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1800 0 0 3 7400 24 0
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1800 0 0 4 7400 25 0
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/* IDSEL 0x14 */
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2000 0 0 1 7400 27 0
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2000 0 0 2 7400 24 0
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2000 0 0 3 7400 25 0
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2000 0 0 4 7400 26 0
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>;
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};
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};
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};
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