From 4b672eb7c98387147d7fa9b8f376795cf43e1969 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= Date: Thu, 18 Mar 2021 18:10:09 +0200 Subject: [PATCH] drm/i915: Remove dead TPS3->TPS2 fallback code MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit If we ever get here with TPS3 then intel_dp_training_pattern() is just broken. Replace the careful fallback with just MISSING_CASE(). Reviewed-by: Daniel Vetter Signed-off-by: Ville Syrjälä Link: https://patchwork.freedesktop.org/patch/msgid/20210318161015.22070-2-ville.syrjala@linux.intel.com --- drivers/gpu/drm/i915/display/intel_dp.c | 16 ++++++---------- 1 file changed, 6 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 2c98335c260c..a6501f2c9e20 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -2503,11 +2503,9 @@ cpt_set_link_train(struct intel_dp *intel_dp, case DP_TRAINING_PATTERN_2: *DP |= DP_LINK_TRAIN_PAT_2_CPT; break; - case DP_TRAINING_PATTERN_3: - drm_dbg_kms(&dev_priv->drm, - "TPS3 not supported, using TPS2 instead\n"); - *DP |= DP_LINK_TRAIN_PAT_2_CPT; - break; + default: + MISSING_CASE(intel_dp_training_pattern_symbol(dp_train_pat)); + return; } intel_de_write(dev_priv, intel_dp->output_reg, intel_dp->DP); @@ -2808,11 +2806,9 @@ g4x_set_link_train(struct intel_dp *intel_dp, case DP_TRAINING_PATTERN_2: *DP |= DP_LINK_TRAIN_PAT_2; break; - case DP_TRAINING_PATTERN_3: - drm_dbg_kms(&dev_priv->drm, - "TPS3 not supported, using TPS2 instead\n"); - *DP |= DP_LINK_TRAIN_PAT_2; - break; + default: + MISSING_CASE(intel_dp_training_pattern_symbol(dp_train_pat)); + return; } intel_de_write(dev_priv, intel_dp->output_reg, intel_dp->DP);