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drm/amd/display: Update idle optimization handling

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[How]
 - use dc interface instead of hwss interface in cursor functions, to keep
dc->idle_optimizations_allowed updated
 - add dc interface to check if idle optimizations might apply to a plane

Signed-off-by: Joshua Aberback <joshua.aberback@amd.com>
Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Joshua Aberback 2020-08-31 01:58:03 -04:00 committed by Alex Deucher
parent 0825d9658b
commit 4b675aad96
3 changed files with 14 additions and 6 deletions
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6
drivers/gpu/drm/amd/display/dc/core/dc.c
View File

@ -3039,4 +3039,10 @@ void dc_lock_memory_clock_frequency(struct dc *dc)
if (dc->current_state->res_ctx.pipe_ctx[i].plane_state)
core_link_enable_stream(dc->current_state, &dc->current_state->res_ctx.pipe_ctx[i]);
}
bool dc_is_plane_eligible_for_idle_optimizaitons(struct dc *dc,
struct dc_plane_state *plane)
{
return false;
}
#endif

11
drivers/gpu/drm/amd/display/dc/core/dc_stream.c
View File

@ -298,7 +298,7 @@ bool dc_stream_set_cursor_attributes(
#if defined(CONFIG_DRM_AMD_DC_DCN3_0)
/* disable idle optimizations while updating cursor */
if (dc->idle_optimizations_allowed) {
dc->hwss.apply_idle_power_optimizations(dc, false);
dc_allow_idle_optimizations(dc, false);
reset_idle_optimizations = true;
}
@ -326,7 +326,7 @@ bool dc_stream_set_cursor_attributes(
#if defined(CONFIG_DRM_AMD_DC_DCN3_0)
/* re-enable idle optimizations if necessary */
if (reset_idle_optimizations)
dc->hwss.apply_idle_power_optimizations(dc, true);
dc_allow_idle_optimizations(dc, true);
#endif
return true;
@ -359,9 +359,8 @@ bool dc_stream_set_cursor_position(
#if defined(CONFIG_DRM_AMD_DC_DCN3_0)
/* disable idle optimizations if enabling cursor */
if (dc->idle_optimizations_allowed &&
!stream->cursor_position.enable && position->enable) {
dc->hwss.apply_idle_power_optimizations(dc, false);
if (dc->idle_optimizations_allowed && !stream->cursor_position.enable && position->enable) {
dc_allow_idle_optimizations(dc, false);
reset_idle_optimizations = true;
}
@ -392,7 +391,7 @@ bool dc_stream_set_cursor_position(
#if defined(CONFIG_DRM_AMD_DC_DCN3_0)
/* re-enable idle optimizations if necessary */
if (reset_idle_optimizations)
dc->hwss.apply_idle_power_optimizations(dc, true);
dc_allow_idle_optimizations(dc, true);
#endif
return true;

3
drivers/gpu/drm/amd/display/dc/dc.h
View File

@ -1250,6 +1250,9 @@ enum dc_status dc_set_clock(struct dc *dc, enum dc_clock_type clock_type, uint32
void dc_get_clock(struct dc *dc, enum dc_clock_type clock_type, struct dc_clock_config *clock_cfg);
#if defined(CONFIG_DRM_AMD_DC_DCN3_0)
bool dc_is_plane_eligible_for_idle_optimizations(struct dc *dc,
struct dc_plane_state *plane);
void dc_allow_idle_optimizations(struct dc *dc, bool allow);
/*