ASoC: mchp-spdiftx: add runtime pm support
Add runtime PM support for Microchip SPDIFTX driver. The runtime PM APIs disables/enables IP's clock and enables/disable caching for regmap. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20221117123750.291911-3-claudiu.beznea@microchip.com Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Claudiu Beznea
Mark Brown
parent
215450eb8b
commit
4bf54ca60f
@ -9,6 +9,7 @@
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/pm_runtime.h>
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#include <linux/spinlock.h>
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#include <sound/asoundef.h>
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@ -175,6 +176,7 @@ static const struct regmap_config mchp_spdiftx_regmap_config = {
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.readable_reg = mchp_spdiftx_readable_reg,
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.writeable_reg = mchp_spdiftx_writeable_reg,
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.precious_reg = mchp_spdiftx_precious_reg,
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.cache_type = REGCACHE_FLAT,
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};
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#define SPDIFTX_GCLK_RATIO 128
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@ -196,7 +198,6 @@ struct mchp_spdiftx_dev {
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struct clk *pclk;
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struct clk *gclk;
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unsigned int fmt;
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unsigned int gclk_enabled:1;
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};
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static inline int mchp_spdiftx_is_running(struct mchp_spdiftx_dev *dev)
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@ -486,10 +487,9 @@ static int mchp_spdiftx_hw_params(struct snd_pcm_substream *substream,
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mchp_spdiftx_channel_status_write(dev);
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spin_unlock_irqrestore(&ctrl->lock, flags);
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if (dev->gclk_enabled) {
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clk_disable_unprepare(dev->gclk);
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dev->gclk_enabled = 0;
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}
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/* GCLK is enabled by runtime PM. */
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clk_disable_unprepare(dev->gclk);
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ret = clk_set_rate(dev->gclk, params_rate(params) *
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SPDIFTX_GCLK_RATIO);
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if (ret) {
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@ -503,7 +503,7 @@ static int mchp_spdiftx_hw_params(struct snd_pcm_substream *substream,
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dev_err(dev->dev, "unable to enable gclk: %d\n", ret);
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return ret;
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}
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dev->gclk_enabled = 1;
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dev_dbg(dev->dev, "%s(): GCLK set to %d\n", __func__,
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params_rate(params) * SPDIFTX_GCLK_RATIO);
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@ -523,10 +523,6 @@ static int mchp_spdiftx_hw_free(struct snd_pcm_substream *substream,
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regmap_write(dev->regmap, SPDIFTX_IDR,
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SPDIFTX_IR_TXUDR | SPDIFTX_IR_TXOVR);
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if (dev->gclk_enabled) {
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clk_disable_unprepare(dev->gclk);
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dev->gclk_enabled = 0;
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}
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return regmap_write(dev->regmap, SPDIFTX_CR,
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SPDIFTX_CR_SWRST | SPDIFTX_CR_FCLR);
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@ -709,17 +705,9 @@ static struct snd_kcontrol_new mchp_spdiftx_ctrls[] = {
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static int mchp_spdiftx_dai_probe(struct snd_soc_dai *dai)
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{
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struct mchp_spdiftx_dev *dev = snd_soc_dai_get_drvdata(dai);
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int ret;
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snd_soc_dai_init_dma_data(dai, &dev->playback, NULL);
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ret = clk_prepare_enable(dev->pclk);
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if (ret) {
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dev_err(dev->dev,
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"failed to enable the peripheral clock: %d\n", ret);
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return ret;
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}
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/* Add controls */
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snd_soc_add_dai_controls(dai, mchp_spdiftx_ctrls,
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ARRAY_SIZE(mchp_spdiftx_ctrls));
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@ -727,19 +715,9 @@ static int mchp_spdiftx_dai_probe(struct snd_soc_dai *dai)
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return 0;
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}
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static int mchp_spdiftx_dai_remove(struct snd_soc_dai *dai)
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{
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struct mchp_spdiftx_dev *dev = snd_soc_dai_get_drvdata(dai);
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clk_disable_unprepare(dev->pclk);
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return 0;
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}
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static struct snd_soc_dai_driver mchp_spdiftx_dai = {
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.name = "mchp-spdiftx",
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.probe = mchp_spdiftx_dai_probe,
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.remove = mchp_spdiftx_dai_remove,
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.playback = {
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.stream_name = "S/PDIF Playback",
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.channels_min = 1,
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@ -763,6 +741,54 @@ static const struct of_device_id mchp_spdiftx_dt_ids[] = {
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};
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MODULE_DEVICE_TABLE(of, mchp_spdiftx_dt_ids);
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static int mchp_spdiftx_runtime_suspend(struct device *dev)
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{
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struct mchp_spdiftx_dev *spdiftx = dev_get_drvdata(dev);
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regcache_cache_only(spdiftx->regmap, true);
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clk_disable_unprepare(spdiftx->gclk);
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clk_disable_unprepare(spdiftx->pclk);
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return 0;
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}
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static int mchp_spdiftx_runtime_resume(struct device *dev)
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{
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struct mchp_spdiftx_dev *spdiftx = dev_get_drvdata(dev);
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int ret;
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ret = clk_prepare_enable(spdiftx->pclk);
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if (ret) {
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dev_err(spdiftx->dev,
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"failed to enable the peripheral clock: %d\n", ret);
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return ret;
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}
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ret = clk_prepare_enable(spdiftx->gclk);
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if (ret) {
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dev_err(spdiftx->dev,
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"failed to enable generic clock: %d\n", ret);
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goto disable_pclk;
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}
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regcache_cache_only(spdiftx->regmap, false);
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regcache_mark_dirty(spdiftx->regmap);
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ret = regcache_sync(spdiftx->regmap);
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if (ret) {
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regcache_cache_only(spdiftx->regmap, true);
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clk_disable_unprepare(spdiftx->gclk);
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disable_pclk:
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clk_disable_unprepare(spdiftx->pclk);
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}
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return ret;
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}
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static const struct dev_pm_ops mchp_spdiftx_pm_ops = {
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RUNTIME_PM_OPS(mchp_spdiftx_runtime_suspend, mchp_spdiftx_runtime_resume,
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NULL)
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};
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static int mchp_spdiftx_probe(struct platform_device *pdev)
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{
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struct mchp_spdiftx_dev *dev;
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@ -827,29 +853,59 @@ static int mchp_spdiftx_probe(struct platform_device *pdev)
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dev->regmap = regmap;
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platform_set_drvdata(pdev, dev);
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pm_runtime_enable(dev->dev);
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if (!pm_runtime_enabled(dev->dev)) {
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err = mchp_spdiftx_runtime_resume(dev->dev);
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if (err)
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return err;
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}
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dev->playback.addr = (dma_addr_t)mem->start + SPDIFTX_CDR;
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dev->playback.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
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err = devm_snd_dmaengine_pcm_register(&pdev->dev, NULL, 0);
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if (err) {
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dev_err(&pdev->dev, "failed to register PMC: %d\n", err);
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return err;
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goto pm_runtime_suspend;
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}
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err = devm_snd_soc_register_component(&pdev->dev,
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&mchp_spdiftx_component,
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&mchp_spdiftx_dai, 1);
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if (err)
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if (err) {
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dev_err(&pdev->dev, "failed to register component: %d\n", err);
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goto pm_runtime_suspend;
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}
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return 0;
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pm_runtime_suspend:
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if (!pm_runtime_status_suspended(dev->dev))
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mchp_spdiftx_runtime_suspend(dev->dev);
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pm_runtime_disable(dev->dev);
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return err;
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}
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static int mchp_spdiftx_remove(struct platform_device *pdev)
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{
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struct mchp_spdiftx_dev *dev = platform_get_drvdata(pdev);
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if (!pm_runtime_status_suspended(dev->dev))
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mchp_spdiftx_runtime_suspend(dev->dev);
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pm_runtime_disable(dev->dev);
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return 0;
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}
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static struct platform_driver mchp_spdiftx_driver = {
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.probe = mchp_spdiftx_probe,
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.remove = mchp_spdiftx_remove,
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.driver = {
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.name = "mchp_spdiftx",
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.of_match_table = of_match_ptr(mchp_spdiftx_dt_ids),
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.pm = pm_ptr(&mchp_spdiftx_pm_ops)
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},
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};
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