drm/amd/amdgpu: add smu support for beige_goby

Use soft-pptable for beige_goby

v2: fix format

Signed-off-by: Chengming Gui <Jack.Gui@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Chengming Gui 2020-11-03 11:37:23 +08:00 committed by Alex Deucher
parent c86eb51705
commit 4d3526690a
4 changed files with 15 additions and 2 deletions

View File

@ -959,6 +959,9 @@ int nv_set_ip_blocks(struct amdgpu_device *adev)
amdgpu_device_ip_block_add(adev, &sdma_v5_2_ip_block);
if (adev->enable_virtual_display || amdgpu_sriov_vf(adev))
amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block);
if (adev->firmware.load_type == AMDGPU_FW_LOAD_DIRECT &&
is_support_sw_smu(adev))
amdgpu_device_ip_block_add(adev, &smu_v11_0_ip_block);
break;
default:
return -EINVAL;

View File

@ -34,6 +34,7 @@
#define SMU11_DRIVER_IF_VERSION_Navy_Flounder 0xE
#define SMU11_DRIVER_IF_VERSION_VANGOGH 0x03
#define SMU11_DRIVER_IF_VERSION_Dimgrey_Cavefish 0xF
#define SMU11_DRIVER_IF_VERSION_Beige_Goby 0x7
/* MP Apertures */
#define MP0_Public 0x03800000

View File

@ -570,6 +570,7 @@ static int smu_set_funcs(struct amdgpu_device *adev)
case CHIP_SIENNA_CICHLID:
case CHIP_NAVY_FLOUNDER:
case CHIP_DIMGREY_CAVEFISH:
case CHIP_BEIGE_GOBY:
sienna_cichlid_set_ppt_funcs(smu);
break;
case CHIP_ALDEBARAN:

View File

@ -63,6 +63,7 @@ MODULE_FIRMWARE("amdgpu/navi12_smc.bin");
MODULE_FIRMWARE("amdgpu/sienna_cichlid_smc.bin");
MODULE_FIRMWARE("amdgpu/navy_flounder_smc.bin");
MODULE_FIRMWARE("amdgpu/dimgrey_cavefish_smc.bin");
MODULE_FIRMWARE("amdgpu/beige_goby_smc.bin");
#define SMU11_VOLTAGE_SCALE 4
@ -115,6 +116,9 @@ int smu_v11_0_init_microcode(struct smu_context *smu)
case CHIP_DIMGREY_CAVEFISH:
chip_name = "dimgrey_cavefish";
break;
case CHIP_BEIGE_GOBY:
chip_name = "beige_goby";
break;
default:
dev_err(adev->dev, "Unsupported ASIC type %d\n", adev->asic_type);
return -EINVAL;
@ -259,6 +263,9 @@ int smu_v11_0_check_fw_version(struct smu_context *smu)
case CHIP_DIMGREY_CAVEFISH:
smu->smc_driver_if_version = SMU11_DRIVER_IF_VERSION_Dimgrey_Cavefish;
break;
case CHIP_BEIGE_GOBY:
smu->smc_driver_if_version = SMU11_DRIVER_IF_VERSION_Beige_Goby;
break;
default:
dev_err(smu->adev->dev, "smu unsupported asic type:%d.\n", smu->adev->asic_type);
smu->smc_driver_if_version = SMU11_DRIVER_IF_VERSION_INV;
@ -341,7 +348,8 @@ int smu_v11_0_setup_pptable(struct smu_context *smu)
hdr = (const struct smc_firmware_header_v1_0 *) adev->pm.fw->data;
version_major = le16_to_cpu(hdr->header.header_version_major);
version_minor = le16_to_cpu(hdr->header.header_version_minor);
if (version_major == 2 && smu->smu_table.boot_values.pp_table_id > 0) {
if ((version_major == 2 && smu->smu_table.boot_values.pp_table_id > 0) ||
adev->asic_type == CHIP_BEIGE_GOBY) {
dev_info(adev->dev, "use driver provided pptable %d\n", smu->smu_table.boot_values.pp_table_id);
switch (version_minor) {
case 0:
@ -729,7 +737,7 @@ int smu_v11_0_init_display_count(struct smu_context *smu, uint32_t count)
* display num currently
*/
if (adev->asic_type >= CHIP_NAVY_FLOUNDER &&
adev->asic_type <= CHIP_DIMGREY_CAVEFISH)
adev->asic_type <= CHIP_BEIGE_GOBY)
return 0;
return smu_cmn_send_smc_msg_with_param(smu,