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drm/i915: Don't try to place HWS in non-existing mappable region

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HWS placement restrictions can't just rely on HAS_LLC flag.

Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Acked-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20191029095856.25431-5-matthew.auld@intel.com
This commit is contained in:
Michal Wajdeczko 2019-10-29 09:58:54 +00:00 committed by Chris Wilson
parent 895d8ebeaa
commit 4dc0a7cae2
1 changed files with 1 additions and 1 deletions
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2
drivers/gpu/drm/i915/gt/intel_engine_cs.c
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@ -528,7 +528,7 @@ static int pin_ggtt_status_page(struct intel_engine_cs *engine,
unsigned int flags;
flags = PIN_GLOBAL;
if (!HAS_LLC(engine->i915))
if (!HAS_LLC(engine->i915) && i915_ggtt_has_aperture(engine->gt->ggtt))
/*
* On g33, we cannot place HWS above 256MiB, so
* restrict its pinning to the low mappable arena.