SOC_FOO to ARCH_FOO conversion for RISC-V
RISC-V is an outlier in using SOC_FOO rather than ARCH_FOO for vendors/micro-archs. SOC_FOO may make more sense (I personally prefer it), but the rest of the "world" uses ARCH_FOO. That'd be fine, with with an increasing number of existing SoC vendors moving to RISC-V, unifying our symbol names with the expectations of the rest of the world makes sense. Folks did not seem keen on changing the world (and they can't really be blamed for that) so convert RISC-V over to match. Add some ARCH_FOO stubs alongside the existing SOC_FOO ones, which will be removed once all users of SOC_FOO have been converted*, and convert the DT bits of RISC-V kbuild over to the new symbols. * It may be best to wait until after the next LTS to remove the SOC_FOO ones, for the sake of external users. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQRh246EGq/8RLhDjO14tDGHoIJi0gUCY6s59gAKCRB4tDGHoIJi 0v00AQD6vcfhTjh4Wmt9hA65h/VGE+bcBaVNsa46um3Tk3oW8AEAolWHrjiDi587 SMdWyb4W1JLEzeIP75ijTwYDN/zu9AE= =em8q -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQJHBAABCAAxFiEEKzw3R0RoQ7JKlDp6LhMZ81+7GIkFAmOskqYTHHBhbG1lckBk YWJiZWx0LmNvbQAKCRAuExnzX7sYibP4D/9aKGLEUzIYrrTBYCUIJhmaHfoDvpPg +tNcNsWotoiT+ShapRPOv81l7VsmhH1DlwFv80wlp3pRr2cxJS/cQ/haxDQvlOVd iNvK2ijhQ/2/5884A+2zV4O+wxZOxx/t+P29yv/ziGT7y/eDBebkQSe8TDq7jlga DIYonJn4KypZUoD+WltTIFfMewbgsb/kFkx3hCzT/vL6S8DshA78gu7u8GAEYMBB 9mjRk6XlkxSesoOPO9TuYg3PL3lVXEVfUIFLwo6S1zaq76nU3McS/U1bpWKWdWUd ICjx8LUNTrRroq5Wmj95RqyDDF6RGacFrkzm66CoIiBVmOlpyYjSokrE6VpCFUry g3oat+13ygM2rv5mJUuuG3ZB/c3DyIDlrsMrSxtQqSwgePqGeG9kLKnZPRt4ZGy+ 1kSYf+dG8rl3jPcG1Rtbo4F063gEpqenIzq7rUtNaYs/6Rp5V4iVaLvwpvTei/I0 p2iLYsfdTUSKFU+mfXuHHInohvnIikOn3fft+1Sd270Y2o8gpx6b5wuL7LSjgXCP hMB/+JaQhyEGi9S9+gS/g/Tk/lWJav0+PZL8xdCvUdGlpjjYGXq69eANazjUaLrd a9Mv/9rudnhsBRBUuY2BmSpcWlWr4N0dNpJGKt/QytQIFSdl3dZ2AD3x/ptk9z8b zCP0JGpiI6D3kw== =miUE -----END PGP SIGNATURE----- Merge tag 'soc2arch-immutable' of git://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into for-next SOC_FOO to ARCH_FOO conversion for RISC-V RISC-V is an outlier in using SOC_FOO rather than ARCH_FOO for vendors/micro-archs. SOC_FOO may make more sense (I personally prefer it), but the rest of the "world" uses ARCH_FOO. That'd be fine, with with an increasing number of existing SoC vendors moving to RISC-V, unifying our symbol names with the expectations of the rest of the world makes sense. Folks did not seem keen on changing the world (and they can't really be blamed for that) so convert RISC-V over to match. Add some ARCH_FOO stubs alongside the existing SOC_FOO ones, which will be removed once all users of SOC_FOO have been converted*, and convert the DT bits of RISC-V kbuild over to the new symbols. * It may be best to wait until after the next LTS to remove the SOC_FOO ones, for the sake of external users. * tag 'soc2arch-immutable' of git://git.kernel.org/pub/scm/linux/kernel/git/conor/linux: RISC-V: stop directly selecting drivers for SOC_CANAAN RISC-V: stop selecting SiFive clock and serial drivers directly RISC-V: stop selecting the PolarFire SoC clock driver RISC-V: kbuild: convert all use of SOC_FOO to ARCH_FOO RISC-V: kconfig.socs: convert usage of SOC_CANAAN to ARCH_CANAAN RISC-V: introduce ARCH_FOO kconfig aliases for SOC_FOO symbols Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
This commit is contained in:
Palmer Dabbelt
commit
4e1ce304ea
@ -1,8 +1,10 @@
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menu "SoC selection"
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config ARCH_MICROCHIP_POLARFIRE
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def_bool SOC_MICROCHIP_POLARFIRE
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config SOC_MICROCHIP_POLARFIRE
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bool "Microchip PolarFire SoCs"
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select MCHP_CLK_MPFS
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help
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This enables support for Microchip PolarFire SoC platforms.
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@ -11,16 +13,18 @@ config ARCH_RENESAS
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help
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This enables support for the RISC-V based Renesas SoCs.
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config ARCH_SIFIVE
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def_bool SOC_SIFIVE
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config SOC_SIFIVE
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bool "SiFive SoCs"
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select SERIAL_SIFIVE if TTY
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select SERIAL_SIFIVE_CONSOLE if TTY
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select CLK_SIFIVE
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select CLK_SIFIVE_PRCI
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select ERRATA_SIFIVE if !XIP_KERNEL
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help
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This enables support for SiFive SoC platform hardware.
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config ARCH_STARFIVE
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def_bool SOC_STARFIVE
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config SOC_STARFIVE
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bool "StarFive SoCs"
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select PINCTRL
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@ -28,6 +32,9 @@ config SOC_STARFIVE
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help
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This enables support for StarFive SoC platform hardware.
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config ARCH_VIRT
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def_bool SOC_VIRT
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config SOC_VIRT
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bool "QEMU Virt Machine"
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select CLINT_TIMER if RISCV_M_MODE
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@ -42,24 +49,27 @@ config SOC_VIRT
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help
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This enables support for QEMU Virt Machine.
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config ARCH_CANAAN
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def_bool SOC_CANAAN
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config SOC_CANAAN
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bool "Canaan Kendryte K210 SoC"
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depends on !MMU
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select CLINT_TIMER if RISCV_M_MODE
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select SERIAL_SIFIVE if TTY
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select SERIAL_SIFIVE_CONSOLE if TTY
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select ARCH_HAS_RESET_CONTROLLER
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select PINCTRL
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select COMMON_CLK
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select COMMON_CLK_K210
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help
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This enables support for Canaan Kendryte K210 SoC platform hardware.
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if SOC_CANAAN
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if ARCH_CANAAN
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config ARCH_CANAAN_K210_DTB_BUILTIN
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def_bool SOC_CANAAN_K210_DTB_BUILTIN
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config SOC_CANAAN_K210_DTB_BUILTIN
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bool "Builtin device tree for the Canaan Kendryte K210"
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depends on SOC_CANAAN
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depends on ARCH_CANAAN
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default y
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select OF
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select BUILTIN_DTB
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@ -68,16 +78,19 @@ config SOC_CANAAN_K210_DTB_BUILTIN
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This option should be selected if no bootloader is being used.
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If unsure, say Y.
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config ARCH_CANAAN_K210_DTB_SOURCE
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def_bool SOC_CANAAN_K210_DTB_SOURCE
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config SOC_CANAAN_K210_DTB_SOURCE
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string "Source file for the Canaan Kendryte K210 builtin DTB"
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depends on SOC_CANAAN
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depends on SOC_CANAAN_K210_DTB_BUILTIN
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depends on ARCH_CANAAN
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depends on ARCH_CANAAN_K210_DTB_BUILTIN
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default "k210_generic"
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help
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Base name (without suffix, relative to arch/riscv/boot/dts/canaan)
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for the DTS file that will be used to produce the DTB linked into the
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kernel.
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endif # SOC_CANAAN
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endif # ARCH_CANAAN
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endmenu # "SoC selection"
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@ -131,7 +131,7 @@ endif
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endif
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ifneq ($(CONFIG_XIP_KERNEL),y)
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ifeq ($(CONFIG_RISCV_M_MODE)$(CONFIG_SOC_CANAAN),yy)
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ifeq ($(CONFIG_RISCV_M_MODE)$(CONFIG_ARCH_CANAAN),yy)
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KBUILD_IMAGE := $(boot)/loader.bin
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else
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ifeq ($(CONFIG_EFI_ZBOOT),)
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@ -1,7 +1,7 @@
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# SPDX-License-Identifier: GPL-2.0
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subdir-y += sifive
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subdir-y += starfive
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subdir-$(CONFIG_SOC_CANAAN_K210_DTB_BUILTIN) += canaan
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subdir-y += canaan
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subdir-y += microchip
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subdir-y += renesas
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@ -1,9 +1,9 @@
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# SPDX-License-Identifier: GPL-2.0
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dtb-$(CONFIG_SOC_CANAAN) += canaan_kd233.dtb
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dtb-$(CONFIG_SOC_CANAAN) += k210_generic.dtb
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dtb-$(CONFIG_SOC_CANAAN) += sipeed_maix_bit.dtb
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dtb-$(CONFIG_SOC_CANAAN) += sipeed_maix_dock.dtb
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dtb-$(CONFIG_SOC_CANAAN) += sipeed_maix_go.dtb
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dtb-$(CONFIG_SOC_CANAAN) += sipeed_maixduino.dtb
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dtb-$(CONFIG_ARCH_CANAAN) += canaan_kd233.dtb
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dtb-$(CONFIG_ARCH_CANAAN) += k210_generic.dtb
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dtb-$(CONFIG_ARCH_CANAAN) += sipeed_maix_bit.dtb
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dtb-$(CONFIG_ARCH_CANAAN) += sipeed_maix_dock.dtb
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dtb-$(CONFIG_ARCH_CANAAN) += sipeed_maix_go.dtb
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dtb-$(CONFIG_ARCH_CANAAN) += sipeed_maixduino.dtb
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obj-$(CONFIG_SOC_CANAAN_K210_DTB_BUILTIN) += $(addsuffix .dtb.o, $(CONFIG_SOC_CANAAN_K210_DTB_SOURCE))
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obj-$(CONFIG_ARCH_CANAAN_K210_DTB_BUILTIN) += $(addsuffix .dtb.o, $(CONFIG_ARCH_CANAAN_K210_DTB_SOURCE))
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@ -1,6 +1,6 @@
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# SPDX-License-Identifier: GPL-2.0
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dtb-$(CONFIG_SOC_MICROCHIP_POLARFIRE) += mpfs-icicle-kit.dtb
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dtb-$(CONFIG_SOC_MICROCHIP_POLARFIRE) += mpfs-m100pfsevp.dtb
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dtb-$(CONFIG_SOC_MICROCHIP_POLARFIRE) += mpfs-polarberry.dtb
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dtb-$(CONFIG_SOC_MICROCHIP_POLARFIRE) += mpfs-sev-kit.dtb
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dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-icicle-kit.dtb
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dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-m100pfsevp.dtb
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dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-polarberry.dtb
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dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-sev-kit.dtb
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obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .o, $(dtb-y))
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@ -1,4 +1,4 @@
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# SPDX-License-Identifier: GPL-2.0
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dtb-$(CONFIG_SOC_SIFIVE) += hifive-unleashed-a00.dtb \
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hifive-unmatched-a00.dtb
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dtb-$(CONFIG_ARCH_SIFIVE) += hifive-unleashed-a00.dtb \
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hifive-unmatched-a00.dtb
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obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .o, $(dtb-y))
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@ -1,2 +1,2 @@
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# SPDX-License-Identifier: GPL-2.0
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dtb-$(CONFIG_SOC_STARFIVE) += jh7100-beaglev-starlight.dtb jh7100-starfive-visionfive-v1.dtb
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dtb-$(CONFIG_ARCH_STARFIVE) += jh7100-beaglev-starlight.dtb jh7100-starfive-visionfive-v1.dtb
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