IB/ipath: Add flag and handling for chips with swapped register bug
The 6110 had a bug that caused some registers to be swapped; it was fixed for the 7220 (and didn't affect the 6120 because it had fewer registers). This adds a flag and related code to handle that, and includes some minor cleanups in the same area. Signed-off-by: Ralph Campbell <ralph.campbell@qlogic.com>
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60948a4158
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@ -1340,14 +1340,9 @@ static void ipath_update_pio_bufs(struct ipath_devdata *dd)
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/*
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/*
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* Chip Errata: bug 6641; even and odd qwords>3 are swapped
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* Chip Errata: bug 6641; even and odd qwords>3 are swapped
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*/
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*/
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if (i > 3) {
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if (i > 3 && (dd->ipath_flags & IPATH_SWAP_PIOBUFS))
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if (i & 1)
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piov = le64_to_cpu(dd->ipath_pioavailregs_dma[i ^ 1]);
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piov = le64_to_cpu(
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else
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dd->ipath_pioavailregs_dma[i - 1]);
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else
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piov = le64_to_cpu(
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dd->ipath_pioavailregs_dma[i + 1]);
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} else
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piov = le64_to_cpu(dd->ipath_pioavailregs_dma[i]);
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piov = le64_to_cpu(dd->ipath_pioavailregs_dma[i]);
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pchg = _IPATH_ALL_CHECKBITS &
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pchg = _IPATH_ALL_CHECKBITS &
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~(dd->ipath_pioavailshadow[i] ^ piov);
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~(dd->ipath_pioavailshadow[i] ^ piov);
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@ -1043,6 +1043,8 @@ static int ipath_setup_ht_config(struct ipath_devdata *dd,
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} while ((pos = pci_find_next_capability(pdev, pos,
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} while ((pos = pci_find_next_capability(pdev, pos,
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PCI_CAP_ID_HT)));
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PCI_CAP_ID_HT)));
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dd->ipath_flags |= IPATH_SWAP_PIOBUFS;
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bail:
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bail:
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return ret;
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return ret;
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}
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}
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@ -528,12 +528,8 @@ static void enable_chip(struct ipath_devdata *dd,
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/*
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/*
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* Chip Errata bug 6641; even and odd qwords>3 are swapped.
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* Chip Errata bug 6641; even and odd qwords>3 are swapped.
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*/
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*/
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if (i > 3) {
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if (i > 3 && (dd->ipath_flags & IPATH_SWAP_PIOBUFS))
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if (i & 1)
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val = dd->ipath_pioavailregs_dma[i ^ 1];
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val = dd->ipath_pioavailregs_dma[i - 1];
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else
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val = dd->ipath_pioavailregs_dma[i + 1];
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}
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else
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else
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val = dd->ipath_pioavailregs_dma[i];
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val = dd->ipath_pioavailregs_dma[i];
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dd->ipath_pioavailshadow[i] = le64_to_cpu(val);
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dd->ipath_pioavailshadow[i] = le64_to_cpu(val);
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@ -831,8 +831,8 @@ void ipath_clear_freeze(struct ipath_devdata *dd)
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*/
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*/
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for (i = 0; i < dd->ipath_pioavregs; i++) {
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for (i = 0; i < dd->ipath_pioavregs; i++) {
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/* deal with 6110 chip bug */
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/* deal with 6110 chip bug */
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im = i > 3 ? ((i&1) ? i-1 : i+1) : i;
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im = i > 3 ? i ^ 1 : i;
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val = ipath_read_kreg64(dd, (0x1000/sizeof(u64))+im);
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val = ipath_read_kreg64(dd, (0x1000 / sizeof(u64)) + im);
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dd->ipath_pioavailregs_dma[i] = dd->ipath_pioavailshadow[i]
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dd->ipath_pioavailregs_dma[i] = dd->ipath_pioavailshadow[i]
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= le64_to_cpu(val);
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= le64_to_cpu(val);
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}
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}
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@ -756,6 +756,7 @@ int ipath_set_rx_pol_inv(struct ipath_devdata *dd, u8 new_pol_inv);
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#define IPATH_DISABLED 0x80000 /* administratively disabled */
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#define IPATH_DISABLED 0x80000 /* administratively disabled */
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/* Use GPIO interrupts for new counters */
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/* Use GPIO interrupts for new counters */
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#define IPATH_GPIO_ERRINTRS 0x100000
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#define IPATH_GPIO_ERRINTRS 0x100000
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#define IPATH_SWAP_PIOBUFS 0x200000
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/* Bits in GPIO for the added interrupts */
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/* Bits in GPIO for the added interrupts */
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#define IPATH_GPIO_PORT0_BIT 2
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#define IPATH_GPIO_PORT0_BIT 2
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