ARM: Remove dependency of plat-orion time code on mach directory includes.
This patch makes the various mach dirs that use the plat-orion time code pass in timer and bridge addresses explicitly, instead of having plat-orion get those values by including a mach dir include file -- the latter mechanism is problematic if you want to support multiple ARM platforms in the same kernel image. Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca> Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
This commit is contained in:
parent
40ff15a6cb
commit
4ee1f6b574
@ -90,6 +90,7 @@ MACHINE_START(CM_A510, "Compulab CM-A510 Board")
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.boot_params = 0x00000100,
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.init_machine = cm_a510_init,
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.map_io = dove_map_io,
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.init_early = dove_init_early,
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.init_irq = dove_init_irq,
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.timer = &dove_timer,
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MACHINE_END
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@ -532,6 +532,11 @@ void __init dove_i2c_init(void)
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/*****************************************************************************
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* Time handling
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****************************************************************************/
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void __init dove_init_early(void)
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{
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orion_time_set_base(TIMER_VIRT_BASE);
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}
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static int get_tclk(void)
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{
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/* use DOVE_RESET_SAMPLE_HI/LO to detect tclk */
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@ -540,7 +545,8 @@ static int get_tclk(void)
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static void dove_timer_init(void)
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{
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orion_time_init(IRQ_DOVE_BRIDGE, get_tclk());
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orion_time_init(BRIDGE_VIRT_BASE, BRIDGE_INT_TIMER1_CLR,
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IRQ_DOVE_BRIDGE, get_tclk());
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}
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struct sys_timer dove_timer = {
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@ -22,6 +22,7 @@ extern struct mbus_dram_target_info dove_mbus_dram_info;
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*/
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void dove_map_io(void);
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void dove_init(void);
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void dove_init_early(void);
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void dove_init_irq(void);
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void dove_setup_cpu_mbus(void);
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void dove_ge00_init(struct mv643xx_eth_platform_data *eth_data);
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@ -97,6 +97,7 @@ MACHINE_START(DOVE_DB, "Marvell DB-MV88AP510-BP Development Board")
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.boot_params = 0x00000100,
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.init_machine = dove_db_init,
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.map_io = dove_map_io,
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.init_early = dove_init_early,
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.init_irq = dove_init_irq,
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.timer = &dove_timer,
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MACHINE_END
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@ -26,10 +26,6 @@
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#define SYSTEM_SOFT_RESET (BRIDGE_VIRT_BASE | 0x010c)
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#define SOFT_RESET 0x00000001
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#define BRIDGE_CAUSE (BRIDGE_VIRT_BASE | 0x0110)
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#define BRIDGE_MASK (BRIDGE_VIRT_BASE | 0x0114)
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#define BRIDGE_INT_TIMER0 0x0002
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#define BRIDGE_INT_TIMER1 0x0004
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#define BRIDGE_INT_TIMER1_CLR (~0x0004)
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#define IRQ_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0200)
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@ -847,6 +847,11 @@ static void __init kirkwood_wdt_init(void)
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/*****************************************************************************
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* Time handling
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****************************************************************************/
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void __init kirkwood_init_early(void)
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{
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orion_time_set_base(TIMER_VIRT_BASE);
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}
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int kirkwood_tclk;
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static int __init kirkwood_find_tclk(void)
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@ -865,7 +870,9 @@ static int __init kirkwood_find_tclk(void)
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static void __init kirkwood_timer_init(void)
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{
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kirkwood_tclk = kirkwood_find_tclk();
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orion_time_init(IRQ_KIRKWOOD_BRIDGE, kirkwood_tclk);
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orion_time_init(BRIDGE_VIRT_BASE, BRIDGE_INT_TIMER1_CLR,
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IRQ_KIRKWOOD_BRIDGE, kirkwood_tclk);
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}
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struct sys_timer kirkwood_timer = {
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@ -27,6 +27,7 @@ struct kirkwood_asoc_platform_data;
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*/
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void kirkwood_map_io(void);
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void kirkwood_init(void);
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void kirkwood_init_early(void);
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void kirkwood_init_irq(void);
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extern struct mbus_dram_target_info kirkwood_mbus_dram_info;
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@ -224,6 +224,7 @@ MACHINE_START(D2NET_V2, "LaCie d2 Network v2")
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.boot_params = 0x00000100,
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.init_machine = d2net_v2_init,
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.map_io = kirkwood_map_io,
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.init_early = kirkwood_init_early,
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.init_irq = kirkwood_init_irq,
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.timer = &kirkwood_timer,
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MACHINE_END
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@ -100,6 +100,7 @@ MACHINE_START(DB88F6281_BP, "Marvell DB-88F6281-BP Development Board")
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.boot_params = 0x00000100,
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.init_machine = db88f6281_init,
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.map_io = kirkwood_map_io,
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.init_early = kirkwood_init_early,
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.init_irq = kirkwood_init_irq,
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.timer = &kirkwood_timer,
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MACHINE_END
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@ -105,6 +105,7 @@ MACHINE_START(DOCKSTAR, "Seagate FreeAgent DockStar")
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.boot_params = 0x00000100,
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.init_machine = dockstar_init,
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.map_io = kirkwood_map_io,
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.init_early = kirkwood_init_early,
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.init_irq = kirkwood_init_irq,
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.timer = &kirkwood_timer,
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MACHINE_END
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@ -124,6 +124,7 @@ MACHINE_START(GURUPLUG, "Marvell GuruPlug Reference Board")
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.boot_params = 0x00000100,
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.init_machine = guruplug_init,
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.map_io = kirkwood_map_io,
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.init_early = kirkwood_init_early,
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.init_irq = kirkwood_init_irq,
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.timer = &kirkwood_timer,
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MACHINE_END
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@ -29,9 +29,6 @@
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#define BRIDGE_CAUSE (BRIDGE_VIRT_BASE | 0x0110)
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#define WDT_INT_REQ 0x0008
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#define BRIDGE_MASK (BRIDGE_VIRT_BASE | 0x0114)
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#define BRIDGE_INT_TIMER0 0x0002
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#define BRIDGE_INT_TIMER1 0x0004
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#define BRIDGE_INT_TIMER1_CLR (~0x0004)
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#define IRQ_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0200)
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@ -166,6 +166,7 @@ MACHINE_START(MV88F6281GTW_GE, "Marvell 88F6281 GTW GE Board")
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.boot_params = 0x00000100,
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.init_machine = mv88f6281gtw_ge_init,
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.map_io = kirkwood_map_io,
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.init_early = kirkwood_init_early,
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.init_irq = kirkwood_init_irq,
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.timer = &kirkwood_timer,
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MACHINE_END
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@ -261,6 +261,7 @@ MACHINE_START(NETSPACE_V2, "LaCie Network Space v2")
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.boot_params = 0x00000100,
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.init_machine = netspace_v2_init,
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.map_io = kirkwood_map_io,
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.init_early = kirkwood_init_early,
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.init_irq = kirkwood_init_irq,
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.timer = &kirkwood_timer,
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MACHINE_END
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@ -271,6 +272,7 @@ MACHINE_START(INETSPACE_V2, "LaCie Internet Space v2")
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.boot_params = 0x00000100,
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.init_machine = netspace_v2_init,
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.map_io = kirkwood_map_io,
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.init_early = kirkwood_init_early,
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.init_irq = kirkwood_init_irq,
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.timer = &kirkwood_timer,
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MACHINE_END
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@ -281,6 +283,7 @@ MACHINE_START(NETSPACE_MAX_V2, "LaCie Network Space Max v2")
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.boot_params = 0x00000100,
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.init_machine = netspace_v2_init,
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.map_io = kirkwood_map_io,
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.init_early = kirkwood_init_early,
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.init_irq = kirkwood_init_irq,
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.timer = &kirkwood_timer,
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MACHINE_END
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@ -402,6 +402,7 @@ MACHINE_START(NET2BIG_V2, "LaCie 2Big Network v2")
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.boot_params = 0x00000100,
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.init_machine = netxbig_v2_init,
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.map_io = kirkwood_map_io,
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.init_early = kirkwood_init_early,
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.init_irq = kirkwood_init_irq,
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.timer = &kirkwood_timer,
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MACHINE_END
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@ -412,6 +413,7 @@ MACHINE_START(NET5BIG_V2, "LaCie 5Big Network v2")
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.boot_params = 0x00000100,
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.init_machine = netxbig_v2_init,
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.map_io = kirkwood_map_io,
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.init_early = kirkwood_init_early,
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.init_irq = kirkwood_init_irq,
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.timer = &kirkwood_timer,
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MACHINE_END
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@ -217,6 +217,7 @@ MACHINE_START(OPENRD_BASE, "Marvell OpenRD Base Board")
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.boot_params = 0x00000100,
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.init_machine = openrd_init,
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.map_io = kirkwood_map_io,
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.init_early = kirkwood_init_early,
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.init_irq = kirkwood_init_irq,
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.timer = &kirkwood_timer,
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MACHINE_END
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@ -228,6 +229,7 @@ MACHINE_START(OPENRD_CLIENT, "Marvell OpenRD Client Board")
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.boot_params = 0x00000100,
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.init_machine = openrd_init,
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.map_io = kirkwood_map_io,
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.init_early = kirkwood_init_early,
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.init_irq = kirkwood_init_irq,
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.timer = &kirkwood_timer,
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MACHINE_END
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@ -239,6 +241,7 @@ MACHINE_START(OPENRD_ULTIMATE, "Marvell OpenRD Ultimate Board")
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.boot_params = 0x00000100,
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.init_machine = openrd_init,
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.map_io = kirkwood_map_io,
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.init_early = kirkwood_init_early,
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.init_irq = kirkwood_init_irq,
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.timer = &kirkwood_timer,
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MACHINE_END
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@ -82,6 +82,7 @@ MACHINE_START(RD88F6192_NAS, "Marvell RD-88F6192-NAS Development Board")
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.boot_params = 0x00000100,
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.init_machine = rd88f6192_init,
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.map_io = kirkwood_map_io,
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.init_early = kirkwood_init_early,
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.init_irq = kirkwood_init_irq,
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.timer = &kirkwood_timer,
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MACHINE_END
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@ -118,6 +118,7 @@ MACHINE_START(RD88F6281, "Marvell RD-88F6281 Reference Board")
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.boot_params = 0x00000100,
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.init_machine = rd88f6281_init,
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.map_io = kirkwood_map_io,
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.init_early = kirkwood_init_early,
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.init_irq = kirkwood_init_irq,
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.timer = &kirkwood_timer,
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MACHINE_END
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@ -134,6 +134,7 @@ MACHINE_START(SHEEVAPLUG, "Marvell SheevaPlug Reference Board")
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.boot_params = 0x00000100,
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.init_machine = sheevaplug_init,
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.map_io = kirkwood_map_io,
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.init_early = kirkwood_init_early,
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.init_irq = kirkwood_init_irq,
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.timer = &kirkwood_timer,
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MACHINE_END
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@ -144,6 +145,7 @@ MACHINE_START(ESATA_SHEEVAPLUG, "Marvell eSATA SheevaPlug Reference Board")
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.boot_params = 0x00000100,
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.init_machine = sheevaplug_init,
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.map_io = kirkwood_map_io,
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.init_early = kirkwood_init_early,
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.init_irq = kirkwood_init_irq,
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.timer = &kirkwood_timer,
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MACHINE_END
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@ -204,6 +204,7 @@ MACHINE_START(T5325, "HP t5325 Thin Client")
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.boot_params = 0x00000100,
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.init_machine = hp_t5325_init,
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.map_io = kirkwood_map_io,
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.init_early = kirkwood_init_early,
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.init_irq = kirkwood_init_irq,
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.timer = &kirkwood_timer,
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MACHINE_END
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@ -135,6 +135,7 @@ MACHINE_START(TS219, "QNAP TS-119/TS-219")
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.boot_params = 0x00000100,
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.init_machine = qnap_ts219_init,
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.map_io = kirkwood_map_io,
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.init_early = kirkwood_init_early,
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.init_irq = kirkwood_init_irq,
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.timer = &kirkwood_timer,
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MACHINE_END
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@ -179,6 +179,7 @@ MACHINE_START(TS41X, "QNAP TS-41x")
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.boot_params = 0x00000100,
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.init_machine = qnap_ts41x_init,
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.map_io = kirkwood_map_io,
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.init_early = kirkwood_init_early,
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.init_irq = kirkwood_init_irq,
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.timer = &kirkwood_timer,
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MACHINE_END
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@ -18,6 +18,7 @@
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#include <asm/timex.h>
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#include <asm/mach/map.h>
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#include <asm/mach/time.h>
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#include <mach/bridge-regs.h>
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#include <mach/loki.h>
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#include <plat/orion_nand.h>
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#include <plat/time.h>
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@ -290,9 +291,15 @@ void __init loki_uart1_init(void)
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/*****************************************************************************
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* Time handling
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****************************************************************************/
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void __init loki_init_early(void)
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{
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orion_time_set_base(TIMER_VIRT_BASE);
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}
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static void loki_timer_init(void)
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{
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orion_time_init(IRQ_LOKI_BRIDGE, LOKI_TCLK);
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orion_time_init(BRIDGE_VIRT_BASE, BRIDGE_INT_TIMER1_CLR,
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IRQ_LOKI_BRIDGE, LOKI_TCLK);
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}
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struct sys_timer loki_timer = {
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@ -18,6 +18,7 @@ struct mv643xx_eth_platform_data;
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*/
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void loki_map_io(void);
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void loki_init(void);
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void loki_init_early(void);
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void loki_init_irq(void);
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extern struct mbus_dram_target_info loki_mbus_dram_info;
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@ -17,11 +17,6 @@
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#define SYSTEM_SOFT_RESET (BRIDGE_VIRT_BASE | 0x010c)
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#define SOFT_RESET 0x00000001
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#define BRIDGE_CAUSE (BRIDGE_VIRT_BASE | 0x0110)
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#define BRIDGE_MASK (BRIDGE_VIRT_BASE | 0x0114)
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#define BRIDGE_INT_TIMER0 0x0002
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#define BRIDGE_INT_TIMER1 0x0004
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#define BRIDGE_INT_TIMER1_CLR 0x0004
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#define IRQ_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0200)
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@ -93,6 +93,7 @@ MACHINE_START(LB88RC8480, "Marvell LB88RC8480 Development Board")
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.boot_params = 0x00000100,
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.init_machine = lb88rc8480_init,
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.map_io = loki_map_io,
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.init_early = loki_init_early,
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.init_irq = loki_init_irq,
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.timer = &loki_timer,
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MACHINE_END
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@ -148,6 +148,7 @@ MACHINE_START(TERASTATION_WXL, "Buffalo Nas WXL")
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.boot_params = 0x00000100,
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.init_machine = wxl_init,
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.map_io = mv78xx0_map_io,
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.init_early = mv78xx0_init_early,
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.init_irq = mv78xx0_init_irq,
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.timer = &mv78xx0_timer,
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MACHINE_END
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@ -818,9 +818,15 @@ void __init mv78xx0_uart3_init(void)
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/*****************************************************************************
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* Time handling
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****************************************************************************/
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void __init mv78xx0_init_early(void)
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{
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orion_time_set_base(TIMER_VIRT_BASE);
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}
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static void mv78xx0_timer_init(void)
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{
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orion_time_init(IRQ_MV78XX0_TIMER_1, get_tclk());
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orion_time_init(BRIDGE_VIRT_BASE, BRIDGE_INT_TIMER1_CLR,
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IRQ_MV78XX0_TIMER_1, get_tclk());
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}
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struct sys_timer mv78xx0_timer = {
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@ -20,6 +20,7 @@ struct mv_sata_platform_data;
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int mv78xx0_core_index(void);
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void mv78xx0_map_io(void);
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void mv78xx0_init(void);
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void mv78xx0_init_early(void);
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void mv78xx0_init_irq(void);
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extern struct mbus_dram_target_info mv78xx0_mbus_dram_info;
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@ -96,6 +96,7 @@ MACHINE_START(DB78X00_BP, "Marvell DB-78x00-BP Development Board")
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.boot_params = 0x00000100,
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.init_machine = db78x00_init,
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.map_io = mv78xx0_map_io,
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.init_early = mv78xx0_init_early,
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.init_irq = mv78xx0_init_irq,
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.timer = &mv78xx0_timer,
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MACHINE_END
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@ -20,10 +20,6 @@
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#define SYSTEM_SOFT_RESET (BRIDGE_VIRT_BASE | 0x010c)
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#define SOFT_RESET 0x00000001
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#define BRIDGE_CAUSE (BRIDGE_VIRT_BASE | 0x0110)
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#define BRIDGE_MASK (BRIDGE_VIRT_BASE | 0x0114)
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#define BRIDGE_INT_TIMER0 0x0002
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#define BRIDGE_INT_TIMER1 0x0004
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#define BRIDGE_INT_TIMER1_CLR (~0x0004)
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#define IRQ_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0200)
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@ -81,6 +81,7 @@ MACHINE_START(RD78X00_MASA, "Marvell RD-78x00-MASA Development Board")
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.boot_params = 0x00000100,
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.init_machine = rd78x00_masa_init,
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.map_io = mv78xx0_map_io,
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.init_early = mv78xx0_init_early,
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.init_irq = mv78xx0_init_irq,
|
||||
.timer = &mv78xx0_timer,
|
||||
MACHINE_END
|
||||
|
@ -26,6 +26,7 @@
|
||||
#include <asm/mach/arch.h>
|
||||
#include <asm/mach/map.h>
|
||||
#include <asm/mach/time.h>
|
||||
#include <mach/bridge-regs.h>
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/orion5x.h>
|
||||
#include <plat/ehci-orion.h>
|
||||
@ -599,6 +600,11 @@ void __init orion5x_wdt_init(void)
|
||||
/*****************************************************************************
|
||||
* Time handling
|
||||
****************************************************************************/
|
||||
void __init orion5x_init_early(void)
|
||||
{
|
||||
orion_time_set_base(TIMER_VIRT_BASE);
|
||||
}
|
||||
|
||||
int orion5x_tclk;
|
||||
|
||||
int __init orion5x_find_tclk(void)
|
||||
@ -616,7 +622,9 @@ int __init orion5x_find_tclk(void)
|
||||
static void orion5x_timer_init(void)
|
||||
{
|
||||
orion5x_tclk = orion5x_find_tclk();
|
||||
orion_time_init(IRQ_ORION5X_BRIDGE, orion5x_tclk);
|
||||
|
||||
orion_time_init(ORION5X_BRIDGE_VIRT_BASE, BRIDGE_INT_TIMER1_CLR,
|
||||
IRQ_ORION5X_BRIDGE, orion5x_tclk);
|
||||
}
|
||||
|
||||
struct sys_timer orion5x_timer = {
|
||||
|
@ -9,6 +9,7 @@ struct mv_sata_platform_data;
|
||||
* Basic Orion init functions used early by machine-setup.
|
||||
*/
|
||||
void orion5x_map_io(void);
|
||||
void orion5x_init_early(void);
|
||||
void orion5x_init_irq(void);
|
||||
void orion5x_init(void);
|
||||
extern int orion5x_tclk;
|
||||
|
@ -339,6 +339,7 @@ MACHINE_START(D2NET, "LaCie d2 Network")
|
||||
.boot_params = 0x00000100,
|
||||
.init_machine = d2net_init,
|
||||
.map_io = orion5x_map_io,
|
||||
.init_early = orion5x_init_early,
|
||||
.init_irq = orion5x_init_irq,
|
||||
.timer = &orion5x_timer,
|
||||
.fixup = tag_fixup_mem32,
|
||||
@ -350,6 +351,7 @@ MACHINE_START(BIGDISK, "LaCie Big Disk Network")
|
||||
.boot_params = 0x00000100,
|
||||
.init_machine = d2net_init,
|
||||
.map_io = orion5x_map_io,
|
||||
.init_early = orion5x_init_early,
|
||||
.init_irq = orion5x_init_irq,
|
||||
.timer = &orion5x_timer,
|
||||
.fixup = tag_fixup_mem32,
|
||||
|
@ -361,6 +361,7 @@ MACHINE_START(DB88F5281, "Marvell Orion-2 Development Board")
|
||||
.boot_params = 0x00000100,
|
||||
.init_machine = db88f5281_init,
|
||||
.map_io = orion5x_map_io,
|
||||
.init_early = orion5x_init_early,
|
||||
.init_irq = orion5x_init_irq,
|
||||
.timer = &orion5x_timer,
|
||||
MACHINE_END
|
||||
|
@ -733,6 +733,7 @@ MACHINE_START(DNS323, "D-Link DNS-323")
|
||||
.boot_params = 0x00000100,
|
||||
.init_machine = dns323_init,
|
||||
.map_io = orion5x_map_io,
|
||||
.init_early = orion5x_init_early,
|
||||
.init_irq = orion5x_init_irq,
|
||||
.timer = &orion5x_timer,
|
||||
.fixup = tag_fixup_mem32,
|
||||
|
@ -254,6 +254,7 @@ MACHINE_START(EDMINI_V2, "LaCie Ethernet Disk mini V2")
|
||||
.boot_params = 0x00000100,
|
||||
.init_machine = edmini_v2_init,
|
||||
.map_io = orion5x_map_io,
|
||||
.init_early = orion5x_init_early,
|
||||
.init_irq = orion5x_init_irq,
|
||||
.timer = &orion5x_timer,
|
||||
.fixup = tag_fixup_mem32,
|
||||
|
@ -22,14 +22,12 @@
|
||||
|
||||
#define CPU_SOFT_RESET (ORION5X_BRIDGE_VIRT_BASE | 0x10c)
|
||||
|
||||
#define BRIDGE_CAUSE (ORION5X_BRIDGE_VIRT_BASE | 0x110)
|
||||
|
||||
#define POWER_MNG_CTRL_REG (ORION5X_BRIDGE_VIRT_BASE | 0x11C)
|
||||
|
||||
#define BRIDGE_CAUSE (ORION5X_BRIDGE_VIRT_BASE | 0x110)
|
||||
#define WDT_INT_REQ 0x0008
|
||||
|
||||
#define BRIDGE_MASK (ORION5X_BRIDGE_VIRT_BASE | 0x114)
|
||||
#define BRIDGE_INT_TIMER0 0x0002
|
||||
#define BRIDGE_INT_TIMER1 0x0004
|
||||
#define BRIDGE_INT_TIMER1_CLR (~0x0004)
|
||||
|
||||
#define MAIN_IRQ_CAUSE (ORION5X_BRIDGE_VIRT_BASE | 0x200)
|
||||
|
@ -382,6 +382,7 @@ MACHINE_START(KUROBOX_PRO, "Buffalo/Revogear Kurobox Pro")
|
||||
.boot_params = 0x00000100,
|
||||
.init_machine = kurobox_pro_init,
|
||||
.map_io = orion5x_map_io,
|
||||
.init_early = orion5x_init_early,
|
||||
.init_irq = orion5x_init_irq,
|
||||
.timer = &orion5x_timer,
|
||||
.fixup = tag_fixup_mem32,
|
||||
@ -394,6 +395,7 @@ MACHINE_START(LINKSTATION_PRO, "Buffalo Linkstation Pro/Live")
|
||||
.boot_params = 0x00000100,
|
||||
.init_machine = kurobox_pro_init,
|
||||
.map_io = orion5x_map_io,
|
||||
.init_early = orion5x_init_early,
|
||||
.init_irq = orion5x_init_irq,
|
||||
.timer = &orion5x_timer,
|
||||
.fixup = tag_fixup_mem32,
|
||||
|
@ -321,6 +321,7 @@ MACHINE_START(LINKSTATION_LSCHL, "Buffalo Linkstation LiveV3 (LS-CHL)")
|
||||
.boot_params = 0x00000100,
|
||||
.init_machine = lschl_init,
|
||||
.map_io = orion5x_map_io,
|
||||
.init_early = orion5x_init_early,
|
||||
.init_irq = orion5x_init_irq,
|
||||
.timer = &orion5x_timer,
|
||||
.fixup = tag_fixup_mem32,
|
||||
|
@ -268,6 +268,7 @@ MACHINE_START(LINKSTATION_LS_HGL, "Buffalo Linkstation LS-HGL")
|
||||
.boot_params = 0x00000100,
|
||||
.init_machine = ls_hgl_init,
|
||||
.map_io = orion5x_map_io,
|
||||
.init_early = orion5x_init_early,
|
||||
.init_irq = orion5x_init_irq,
|
||||
.timer = &orion5x_timer,
|
||||
.fixup = tag_fixup_mem32,
|
||||
|
@ -270,6 +270,7 @@ MACHINE_START(LINKSTATION_MINI, "Buffalo Linkstation Mini")
|
||||
.boot_params = 0x00000100,
|
||||
.init_machine = lsmini_init,
|
||||
.map_io = orion5x_map_io,
|
||||
.init_early = orion5x_init_early,
|
||||
.init_irq = orion5x_init_irq,
|
||||
.timer = &orion5x_timer,
|
||||
.fixup = tag_fixup_mem32,
|
||||
|
@ -264,6 +264,7 @@ MACHINE_START(MSS2, "Maxtor Shared Storage II")
|
||||
.boot_params = 0x00000100,
|
||||
.init_machine = mss2_init,
|
||||
.map_io = orion5x_map_io,
|
||||
.init_early = orion5x_init_early,
|
||||
.init_irq = orion5x_init_irq,
|
||||
.timer = &orion5x_timer,
|
||||
.fixup = tag_fixup_mem32
|
||||
|
@ -232,6 +232,7 @@ MACHINE_START(MV2120, "HP Media Vault mv2120")
|
||||
.boot_params = 0x00000100,
|
||||
.init_machine = mv2120_init,
|
||||
.map_io = orion5x_map_io,
|
||||
.init_early = orion5x_init_early,
|
||||
.init_irq = orion5x_init_irq,
|
||||
.timer = &orion5x_timer,
|
||||
.fixup = tag_fixup_mem32
|
||||
|
@ -422,6 +422,7 @@ MACHINE_START(NET2BIG, "LaCie 2Big Network")
|
||||
.boot_params = 0x00000100,
|
||||
.init_machine = net2big_init,
|
||||
.map_io = orion5x_map_io,
|
||||
.init_early = orion5x_init_early,
|
||||
.init_irq = orion5x_init_irq,
|
||||
.timer = &orion5x_timer,
|
||||
.fixup = tag_fixup_mem32,
|
||||
|
@ -172,6 +172,7 @@ MACHINE_START(RD88F5181L_FXO, "Marvell Orion-VoIP FXO Reference Design")
|
||||
.boot_params = 0x00000100,
|
||||
.init_machine = rd88f5181l_fxo_init,
|
||||
.map_io = orion5x_map_io,
|
||||
.init_early = orion5x_init_early,
|
||||
.init_irq = orion5x_init_irq,
|
||||
.timer = &orion5x_timer,
|
||||
.fixup = tag_fixup_mem32,
|
||||
|
@ -184,6 +184,7 @@ MACHINE_START(RD88F5181L_GE, "Marvell Orion-VoIP GE Reference Design")
|
||||
.boot_params = 0x00000100,
|
||||
.init_machine = rd88f5181l_ge_init,
|
||||
.map_io = orion5x_map_io,
|
||||
.init_early = orion5x_init_early,
|
||||
.init_irq = orion5x_init_irq,
|
||||
.timer = &orion5x_timer,
|
||||
.fixup = tag_fixup_mem32,
|
||||
|
@ -308,6 +308,7 @@ MACHINE_START(RD88F5182, "Marvell Orion-NAS Reference Design")
|
||||
.boot_params = 0x00000100,
|
||||
.init_machine = rd88f5182_init,
|
||||
.map_io = orion5x_map_io,
|
||||
.init_early = orion5x_init_early,
|
||||
.init_irq = orion5x_init_irq,
|
||||
.timer = &orion5x_timer,
|
||||
MACHINE_END
|
||||
|
@ -126,6 +126,7 @@ MACHINE_START(RD88F6183AP_GE, "Marvell Orion-1-90 AP GE Reference Design")
|
||||
.boot_params = 0x00000100,
|
||||
.init_machine = rd88f6183ap_ge_init,
|
||||
.map_io = orion5x_map_io,
|
||||
.init_early = orion5x_init_early,
|
||||
.init_irq = orion5x_init_irq,
|
||||
.timer = &orion5x_timer,
|
||||
.fixup = tag_fixup_mem32,
|
||||
|
@ -361,6 +361,7 @@ MACHINE_START(TERASTATION_PRO2, "Buffalo Terastation Pro II/Live")
|
||||
.boot_params = 0x00000100,
|
||||
.init_machine = tsp2_init,
|
||||
.map_io = orion5x_map_io,
|
||||
.init_early = orion5x_init_early,
|
||||
.init_irq = orion5x_init_irq,
|
||||
.timer = &orion5x_timer,
|
||||
.fixup = tag_fixup_mem32,
|
||||
|
@ -325,6 +325,7 @@ MACHINE_START(TS209, "QNAP TS-109/TS-209")
|
||||
.boot_params = 0x00000100,
|
||||
.init_machine = qnap_ts209_init,
|
||||
.map_io = orion5x_map_io,
|
||||
.init_early = orion5x_init_early,
|
||||
.init_irq = orion5x_init_irq,
|
||||
.timer = &orion5x_timer,
|
||||
.fixup = tag_fixup_mem32,
|
||||
|
@ -314,6 +314,7 @@ MACHINE_START(TS409, "QNAP TS-409")
|
||||
.boot_params = 0x00000100,
|
||||
.init_machine = qnap_ts409_init,
|
||||
.map_io = orion5x_map_io,
|
||||
.init_early = orion5x_init_early,
|
||||
.init_irq = orion5x_init_irq,
|
||||
.timer = &orion5x_timer,
|
||||
.fixup = tag_fixup_mem32,
|
||||
|
@ -613,6 +613,7 @@ MACHINE_START(TS78XX, "Technologic Systems TS-78xx SBC")
|
||||
.boot_params = 0x00000100,
|
||||
.init_machine = ts78xx_init,
|
||||
.map_io = ts78xx_map_io,
|
||||
.init_early = orion5x_init_early,
|
||||
.init_irq = orion5x_init_irq,
|
||||
.timer = &orion5x_timer,
|
||||
MACHINE_END
|
||||
|
@ -175,6 +175,7 @@ MACHINE_START(WNR854T, "Netgear WNR854T")
|
||||
.boot_params = 0x00000100,
|
||||
.init_machine = wnr854t_init,
|
||||
.map_io = orion5x_map_io,
|
||||
.init_early = orion5x_init_early,
|
||||
.init_irq = orion5x_init_irq,
|
||||
.timer = &orion5x_timer,
|
||||
.fixup = tag_fixup_mem32,
|
||||
|
@ -263,6 +263,7 @@ MACHINE_START(WRT350N_V2, "Linksys WRT350N v2")
|
||||
.boot_params = 0x00000100,
|
||||
.init_machine = wrt350n_v2_init,
|
||||
.map_io = orion5x_map_io,
|
||||
.init_early = orion5x_init_early,
|
||||
.init_irq = orion5x_init_irq,
|
||||
.timer = &orion5x_timer,
|
||||
.fixup = tag_fixup_mem32,
|
||||
|
@ -11,7 +11,10 @@
|
||||
#ifndef __PLAT_TIME_H
|
||||
#define __PLAT_TIME_H
|
||||
|
||||
void orion_time_init(unsigned int irq, unsigned int tclk);
|
||||
void orion_time_set_base(u32 timer_base);
|
||||
|
||||
void orion_time_init(u32 bridge_base, u32 bridge_timer1_clr_mask,
|
||||
unsigned int irq, unsigned int tclk);
|
||||
|
||||
|
||||
#endif
|
||||
|
@ -18,28 +18,42 @@
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/irq.h>
|
||||
#include <asm/sched_clock.h>
|
||||
#include <asm/mach/time.h>
|
||||
#include <mach/bridge-regs.h>
|
||||
#include <mach/hardware.h>
|
||||
|
||||
/*
|
||||
* Number of timer ticks per jiffy.
|
||||
* MBus bridge block registers.
|
||||
*/
|
||||
static u32 ticks_per_jiffy;
|
||||
#define BRIDGE_CAUSE_OFF 0x0110
|
||||
#define BRIDGE_MASK_OFF 0x0114
|
||||
#define BRIDGE_INT_TIMER0 0x0002
|
||||
#define BRIDGE_INT_TIMER1 0x0004
|
||||
|
||||
|
||||
/*
|
||||
* Timer block registers.
|
||||
*/
|
||||
#define TIMER_CTRL (TIMER_VIRT_BASE + 0x0000)
|
||||
#define TIMER0_EN 0x0001
|
||||
#define TIMER0_RELOAD_EN 0x0002
|
||||
#define TIMER1_EN 0x0004
|
||||
#define TIMER1_RELOAD_EN 0x0008
|
||||
#define TIMER0_RELOAD (TIMER_VIRT_BASE + 0x0010)
|
||||
#define TIMER0_VAL (TIMER_VIRT_BASE + 0x0014)
|
||||
#define TIMER1_RELOAD (TIMER_VIRT_BASE + 0x0018)
|
||||
#define TIMER1_VAL (TIMER_VIRT_BASE + 0x001c)
|
||||
#define TIMER_CTRL_OFF 0x0000
|
||||
#define TIMER0_EN 0x0001
|
||||
#define TIMER0_RELOAD_EN 0x0002
|
||||
#define TIMER1_EN 0x0004
|
||||
#define TIMER1_RELOAD_EN 0x0008
|
||||
#define TIMER0_RELOAD_OFF 0x0010
|
||||
#define TIMER0_VAL_OFF 0x0014
|
||||
#define TIMER1_RELOAD_OFF 0x0018
|
||||
#define TIMER1_VAL_OFF 0x001c
|
||||
|
||||
|
||||
/*
|
||||
* SoC-specific data.
|
||||
*/
|
||||
static void __iomem *bridge_base;
|
||||
static u32 bridge_timer1_clr_mask;
|
||||
static void __iomem *timer_base;
|
||||
|
||||
|
||||
/*
|
||||
* Number of timer ticks per jiffy.
|
||||
*/
|
||||
static u32 ticks_per_jiffy;
|
||||
|
||||
|
||||
/*
|
||||
@ -50,14 +64,14 @@ static DEFINE_CLOCK_DATA(cd);
|
||||
|
||||
unsigned long long notrace sched_clock(void)
|
||||
{
|
||||
u32 cyc = 0xffffffff - readl(TIMER0_VAL);
|
||||
u32 cyc = ~readl(timer_base + TIMER0_VAL_OFF);
|
||||
return cyc_to_sched_clock(&cd, cyc, (u32)~0);
|
||||
}
|
||||
|
||||
|
||||
static void notrace orion_update_sched_clock(void)
|
||||
{
|
||||
u32 cyc = 0xffffffff - readl(TIMER0_VAL);
|
||||
u32 cyc = ~readl(timer_base + TIMER0_VAL_OFF);
|
||||
update_sched_clock(&cd, cyc, (u32)~0);
|
||||
}
|
||||
|
||||
@ -71,7 +85,7 @@ static void __init setup_sched_clock(unsigned long tclk)
|
||||
*/
|
||||
static cycle_t orion_clksrc_read(struct clocksource *cs)
|
||||
{
|
||||
return 0xffffffff - readl(TIMER0_VAL);
|
||||
return 0xffffffff - readl(timer_base + TIMER0_VAL_OFF);
|
||||
}
|
||||
|
||||
static struct clocksource orion_clksrc = {
|
||||
@ -101,23 +115,23 @@ orion_clkevt_next_event(unsigned long delta, struct clock_event_device *dev)
|
||||
/*
|
||||
* Clear and enable clockevent timer interrupt.
|
||||
*/
|
||||
writel(BRIDGE_INT_TIMER1_CLR, BRIDGE_CAUSE);
|
||||
writel(bridge_timer1_clr_mask, bridge_base + BRIDGE_CAUSE_OFF);
|
||||
|
||||
u = readl(BRIDGE_MASK);
|
||||
u = readl(bridge_base + BRIDGE_MASK_OFF);
|
||||
u |= BRIDGE_INT_TIMER1;
|
||||
writel(u, BRIDGE_MASK);
|
||||
writel(u, bridge_base + BRIDGE_MASK_OFF);
|
||||
|
||||
/*
|
||||
* Setup new clockevent timer value.
|
||||
*/
|
||||
writel(delta, TIMER1_VAL);
|
||||
writel(delta, timer_base + TIMER1_VAL_OFF);
|
||||
|
||||
/*
|
||||
* Enable the timer.
|
||||
*/
|
||||
u = readl(TIMER_CTRL);
|
||||
u = readl(timer_base + TIMER_CTRL_OFF);
|
||||
u = (u & ~TIMER1_RELOAD_EN) | TIMER1_EN;
|
||||
writel(u, TIMER_CTRL);
|
||||
writel(u, timer_base + TIMER_CTRL_OFF);
|
||||
|
||||
local_irq_restore(flags);
|
||||
|
||||
@ -135,37 +149,38 @@ orion_clkevt_mode(enum clock_event_mode mode, struct clock_event_device *dev)
|
||||
/*
|
||||
* Setup timer to fire at 1/HZ intervals.
|
||||
*/
|
||||
writel(ticks_per_jiffy - 1, TIMER1_RELOAD);
|
||||
writel(ticks_per_jiffy - 1, TIMER1_VAL);
|
||||
writel(ticks_per_jiffy - 1, timer_base + TIMER1_RELOAD_OFF);
|
||||
writel(ticks_per_jiffy - 1, timer_base + TIMER1_VAL_OFF);
|
||||
|
||||
/*
|
||||
* Enable timer interrupt.
|
||||
*/
|
||||
u = readl(BRIDGE_MASK);
|
||||
writel(u | BRIDGE_INT_TIMER1, BRIDGE_MASK);
|
||||
u = readl(bridge_base + BRIDGE_MASK_OFF);
|
||||
writel(u | BRIDGE_INT_TIMER1, bridge_base + BRIDGE_MASK_OFF);
|
||||
|
||||
/*
|
||||
* Enable timer.
|
||||
*/
|
||||
u = readl(TIMER_CTRL);
|
||||
writel(u | TIMER1_EN | TIMER1_RELOAD_EN, TIMER_CTRL);
|
||||
u = readl(timer_base + TIMER_CTRL_OFF);
|
||||
writel(u | TIMER1_EN | TIMER1_RELOAD_EN,
|
||||
timer_base + TIMER_CTRL_OFF);
|
||||
} else {
|
||||
/*
|
||||
* Disable timer.
|
||||
*/
|
||||
u = readl(TIMER_CTRL);
|
||||
writel(u & ~TIMER1_EN, TIMER_CTRL);
|
||||
u = readl(timer_base + TIMER_CTRL_OFF);
|
||||
writel(u & ~TIMER1_EN, timer_base + TIMER_CTRL_OFF);
|
||||
|
||||
/*
|
||||
* Disable timer interrupt.
|
||||
*/
|
||||
u = readl(BRIDGE_MASK);
|
||||
writel(u & ~BRIDGE_INT_TIMER1, BRIDGE_MASK);
|
||||
u = readl(bridge_base + BRIDGE_MASK_OFF);
|
||||
writel(u & ~BRIDGE_INT_TIMER1, bridge_base + BRIDGE_MASK_OFF);
|
||||
|
||||
/*
|
||||
* ACK pending timer interrupt.
|
||||
*/
|
||||
writel(BRIDGE_INT_TIMER1_CLR, BRIDGE_CAUSE);
|
||||
writel(bridge_timer1_clr_mask, bridge_base + BRIDGE_CAUSE_OFF);
|
||||
|
||||
}
|
||||
local_irq_restore(flags);
|
||||
@ -185,7 +200,7 @@ static irqreturn_t orion_timer_interrupt(int irq, void *dev_id)
|
||||
/*
|
||||
* ACK timer interrupt and call event handler.
|
||||
*/
|
||||
writel(BRIDGE_INT_TIMER1_CLR, BRIDGE_CAUSE);
|
||||
writel(bridge_timer1_clr_mask, bridge_base + BRIDGE_CAUSE_OFF);
|
||||
orion_clkevt.event_handler(&orion_clkevt);
|
||||
|
||||
return IRQ_HANDLED;
|
||||
@ -197,31 +212,45 @@ static struct irqaction orion_timer_irq = {
|
||||
.handler = orion_timer_interrupt
|
||||
};
|
||||
|
||||
void __init orion_time_init(unsigned int irq, unsigned int tclk)
|
||||
void __init
|
||||
orion_time_set_base(u32 _timer_base)
|
||||
{
|
||||
timer_base = (void __iomem *)_timer_base;
|
||||
}
|
||||
|
||||
void __init
|
||||
orion_time_init(u32 _bridge_base, u32 _bridge_timer1_clr_mask,
|
||||
unsigned int irq, unsigned int tclk)
|
||||
{
|
||||
u32 u;
|
||||
|
||||
/*
|
||||
* Set SoC-specific data.
|
||||
*/
|
||||
bridge_base = (void __iomem *)_bridge_base;
|
||||
bridge_timer1_clr_mask = _bridge_timer1_clr_mask;
|
||||
|
||||
ticks_per_jiffy = (tclk + HZ/2) / HZ;
|
||||
|
||||
/*
|
||||
* Set scale and timer for sched_clock
|
||||
* Set scale and timer for sched_clock.
|
||||
*/
|
||||
setup_sched_clock(tclk);
|
||||
|
||||
/*
|
||||
* Setup free-running clocksource timer (interrupts
|
||||
* disabled.)
|
||||
* disabled).
|
||||
*/
|
||||
writel(0xffffffff, TIMER0_VAL);
|
||||
writel(0xffffffff, TIMER0_RELOAD);
|
||||
u = readl(BRIDGE_MASK);
|
||||
writel(u & ~BRIDGE_INT_TIMER0, BRIDGE_MASK);
|
||||
u = readl(TIMER_CTRL);
|
||||
writel(u | TIMER0_EN | TIMER0_RELOAD_EN, TIMER_CTRL);
|
||||
writel(0xffffffff, timer_base + TIMER0_VAL_OFF);
|
||||
writel(0xffffffff, timer_base + TIMER0_RELOAD_OFF);
|
||||
u = readl(bridge_base + BRIDGE_MASK_OFF);
|
||||
writel(u & ~BRIDGE_INT_TIMER0, bridge_base + BRIDGE_MASK_OFF);
|
||||
u = readl(timer_base + TIMER_CTRL_OFF);
|
||||
writel(u | TIMER0_EN | TIMER0_RELOAD_EN, timer_base + TIMER_CTRL_OFF);
|
||||
clocksource_register_hz(&orion_clksrc, tclk);
|
||||
|
||||
/*
|
||||
* Setup clockevent timer (interrupt-driven.)
|
||||
* Setup clockevent timer (interrupt-driven).
|
||||
*/
|
||||
setup_irq(irq, &orion_timer_irq);
|
||||
orion_clkevt.mult = div_sc(tclk, NSEC_PER_SEC, orion_clkevt.shift);
|
||||
|
Loading…
Reference in New Issue
Block a user