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igb: re-use igb_ptp_reset in igb_ptp_init

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Modify igb_ptp_init to take advantage of igb_ptp_reset, and remove
duplicated work that was occurring in both igb_ptp_reset and
igb_ptp_init.

In total, resetting the TSAUXC register, and resetting the system time
both happen in igb_ptp_reset already. igb_ptp_reset now also takes care
of starting the delayed work item for overflow checks, as well.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Tested-by: Aaron Brown <aaron.f.brown@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
This commit is contained in:
Jacob Keller
2016-05-24 13:56:29 -07:00
committed by Jeff Kirsher
parent 63737166a0
commit 4f3ce71bb8
2 changed files with 18 additions and 33 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1
drivers/net/ethernet/intel/igb/igb_main.c
View File

@ -2027,6 +2027,7 @@ void igb_reset(struct igb_adapter *adapter)
wr32(E1000_VET, ETHERNET_IEEE_VLAN_TYPE); wr32(E1000_VET, ETHERNET_IEEE_VLAN_TYPE);
/* Re-enable PTP, where applicable. */ /* Re-enable PTP, where applicable. */
if (adapter->ptp_flags & IGB_PTP_ENABLED)
igb_ptp_reset(adapter); igb_ptp_reset(adapter);
igb_get_phy_info(hw); igb_get_phy_info(hw);

48
drivers/net/ethernet/intel/igb/igb_ptp.c
View File

@ -1043,6 +1043,13 @@ int igb_ptp_set_ts_config(struct net_device *netdev, struct ifreq *ifr)
-EFAULT : 0; -EFAULT : 0;
} }
/**
* igb_ptp_init - Initialize PTP functionality
* @adapter: Board private structure
*
* This function is called at device probe to initialize the PTP
* functionality.
*/
void igb_ptp_init(struct igb_adapter *adapter) void igb_ptp_init(struct igb_adapter *adapter)
{ {
struct e1000_hw *hw = &adapter->hw; struct e1000_hw *hw = &adapter->hw;
@ -1065,8 +1072,6 @@ void igb_ptp_init(struct igb_adapter *adapter)
adapter->cc.mask = CYCLECOUNTER_MASK(64); adapter->cc.mask = CYCLECOUNTER_MASK(64);
adapter->cc.mult = 1; adapter->cc.mult = 1;
adapter->cc.shift = IGB_82576_TSYNC_SHIFT; adapter->cc.shift = IGB_82576_TSYNC_SHIFT;
/* Dial the nominal frequency. */
wr32(E1000_TIMINCA, INCPERIOD_82576 | INCVALUE_82576);
adapter->ptp_flags |= IGB_PTP_OVERFLOW_CHECK; adapter->ptp_flags |= IGB_PTP_OVERFLOW_CHECK;
break; break;
case e1000_82580: case e1000_82580:
@ -1086,8 +1091,6 @@ void igb_ptp_init(struct igb_adapter *adapter)
adapter->cc.mask = CYCLECOUNTER_MASK(IGB_NBITS_82580); adapter->cc.mask = CYCLECOUNTER_MASK(IGB_NBITS_82580);
adapter->cc.mult = 1; adapter->cc.mult = 1;
adapter->cc.shift = 0; adapter->cc.shift = 0;
/* Enable the timer functions by clearing bit 31. */
wr32(E1000_TSAUXC, 0x0);
adapter->ptp_flags |= IGB_PTP_OVERFLOW_CHECK; adapter->ptp_flags |= IGB_PTP_OVERFLOW_CHECK;
break; break;
case e1000_i210: case e1000_i210:
@ -1113,46 +1116,24 @@ void igb_ptp_init(struct igb_adapter *adapter)
adapter->ptp_caps.settime64 = igb_ptp_settime_i210; adapter->ptp_caps.settime64 = igb_ptp_settime_i210;
adapter->ptp_caps.enable = igb_ptp_feature_enable_i210; adapter->ptp_caps.enable = igb_ptp_feature_enable_i210;
adapter->ptp_caps.verify = igb_ptp_verify_pin; adapter->ptp_caps.verify = igb_ptp_verify_pin;
/* Enable the timer functions by clearing bit 31. */
wr32(E1000_TSAUXC, 0x0);
break; break;
default: default:
adapter->ptp_clock = NULL; adapter->ptp_clock = NULL;
return; return;
} }
wrfl();
spin_lock_init(&adapter->tmreg_lock); spin_lock_init(&adapter->tmreg_lock);
INIT_WORK(&adapter->ptp_tx_work, igb_ptp_tx_work); INIT_WORK(&adapter->ptp_tx_work, igb_ptp_tx_work);
/* Initialize the clock and overflow work for devices that need it. */ if (adapter->ptp_flags & IGB_PTP_OVERFLOW_CHECK)
if ((hw->mac.type == e1000_i210) || (hw->mac.type == e1000_i211)) {
struct timespec64 ts = ktime_to_timespec64(ktime_get_real());
igb_ptp_settime_i210(&adapter->ptp_caps, &ts);
} else {
timecounter_init(&adapter->tc, &adapter->cc,
ktime_to_ns(ktime_get_real()));
}
if (adapter->ptp_flags & IGB_PTP_OVERFLOW_CHECK) {
INIT_DELAYED_WORK(&adapter->ptp_overflow_work, INIT_DELAYED_WORK(&adapter->ptp_overflow_work,
igb_ptp_overflow_check); igb_ptp_overflow_check);
schedule_delayed_work(&adapter->ptp_overflow_work,
IGB_SYSTIM_OVERFLOW_PERIOD);
}
/* Initialize the time sync interrupts for devices that support it. */
if (hw->mac.type >= e1000_82580) {
wr32(E1000_TSIM, TSYNC_INTERRUPTS);
wr32(E1000_IMS, E1000_IMS_TS);
}
adapter->tstamp_config.rx_filter = HWTSTAMP_FILTER_NONE; adapter->tstamp_config.rx_filter = HWTSTAMP_FILTER_NONE;
adapter->tstamp_config.tx_type = HWTSTAMP_TX_OFF; adapter->tstamp_config.tx_type = HWTSTAMP_TX_OFF;
igb_ptp_reset(adapter);
adapter->ptp_clock = ptp_clock_register(&adapter->ptp_caps, adapter->ptp_clock = ptp_clock_register(&adapter->ptp_caps,
&adapter->pdev->dev); &adapter->pdev->dev);
if (IS_ERR(adapter->ptp_clock)) { if (IS_ERR(adapter->ptp_clock)) {
@ -1205,9 +1186,6 @@ void igb_ptp_reset(struct igb_adapter *adapter)
struct e1000_hw *hw = &adapter->hw; struct e1000_hw *hw = &adapter->hw;
unsigned long flags; unsigned long flags;
if (!(adapter->ptp_flags & IGB_PTP_ENABLED))
return;
/* reset the tstamp_config */ /* reset the tstamp_config */
igb_ptp_set_timestamp_mode(adapter, &adapter->tstamp_config); igb_ptp_set_timestamp_mode(adapter, &adapter->tstamp_config);
@ -1244,4 +1222,10 @@ void igb_ptp_reset(struct igb_adapter *adapter)
} }
out: out:
spin_unlock_irqrestore(&adapter->tmreg_lock, flags); spin_unlock_irqrestore(&adapter->tmreg_lock, flags);
wrfl();
if (adapter->ptp_flags & IGB_PTP_OVERFLOW_CHECK)
schedule_delayed_work(&adapter->ptp_overflow_work,
IGB_SYSTIM_OVERFLOW_PERIOD);
} }