ARM: EXYNOS: Fixup debug macros for big-endian
The exynos low-level debug macros need to be fixed if the system is being built big endian. Add the necessary endian swaps for accessing the registers to get output working again Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
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@ -15,11 +15,13 @@
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.macro fifo_level_s5pv210 rd, rx
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.macro fifo_level_s5pv210 rd, rx
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ldr \rd, [\rx, # S3C2410_UFSTAT]
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ldr \rd, [\rx, # S3C2410_UFSTAT]
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ARM_BE8(rev \rd, \rd)
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and \rd, \rd, #S5PV210_UFSTAT_TXMASK
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and \rd, \rd, #S5PV210_UFSTAT_TXMASK
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.endm
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.endm
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.macro fifo_full_s5pv210 rd, rx
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.macro fifo_full_s5pv210 rd, rx
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ldr \rd, [\rx, # S3C2410_UFSTAT]
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ldr \rd, [\rx, # S3C2410_UFSTAT]
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ARM_BE8(rev \rd, \rd)
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tst \rd, #S5PV210_UFSTAT_TXFULL
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tst \rd, #S5PV210_UFSTAT_TXFULL
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.endm
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.endm
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@ -28,6 +30,7 @@
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.macro fifo_level_s3c2440 rd, rx
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.macro fifo_level_s3c2440 rd, rx
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ldr \rd, [\rx, # S3C2410_UFSTAT]
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ldr \rd, [\rx, # S3C2410_UFSTAT]
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ARM_BE8(rev \rd, \rd)
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and \rd, \rd, #S3C2440_UFSTAT_TXMASK
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and \rd, \rd, #S3C2440_UFSTAT_TXMASK
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.endm
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.endm
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@ -37,6 +40,7 @@
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.macro fifo_full_s3c2440 rd, rx
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.macro fifo_full_s3c2440 rd, rx
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ldr \rd, [\rx, # S3C2410_UFSTAT]
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ldr \rd, [\rx, # S3C2410_UFSTAT]
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ARM_BE8(rev \rd, \rd)
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tst \rd, #S3C2440_UFSTAT_TXFULL
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tst \rd, #S3C2440_UFSTAT_TXFULL
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.endm
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.endm
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@ -50,6 +54,7 @@
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.macro busyuart, rd, rx
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.macro busyuart, rd, rx
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ldr \rd, [\rx, # S3C2410_UFCON]
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ldr \rd, [\rx, # S3C2410_UFCON]
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ARM_BE8(rev \rd, \rd)
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tst \rd, #S3C2410_UFCON_FIFOMODE @ fifo enabled?
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tst \rd, #S3C2410_UFCON_FIFOMODE @ fifo enabled?
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beq 1001f @
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beq 1001f @
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@ FIFO enabled...
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@ FIFO enabled...
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@ -61,6 +66,7 @@
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1001:
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1001:
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@ busy waiting for non fifo
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@ busy waiting for non fifo
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ldr \rd, [\rx, # S3C2410_UTRSTAT]
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ldr \rd, [\rx, # S3C2410_UTRSTAT]
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ARM_BE8(rev \rd, \rd)
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tst \rd, #S3C2410_UTRSTAT_TXFE
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tst \rd, #S3C2410_UTRSTAT_TXFE
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beq 1001b
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beq 1001b
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@ -69,6 +75,7 @@
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.macro waituart,rd,rx
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.macro waituart,rd,rx
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ldr \rd, [\rx, # S3C2410_UFCON]
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ldr \rd, [\rx, # S3C2410_UFCON]
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ARM_BE8(rev \rd, \rd)
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tst \rd, #S3C2410_UFCON_FIFOMODE @ fifo enabled?
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tst \rd, #S3C2410_UFCON_FIFOMODE @ fifo enabled?
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beq 1001f @
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beq 1001f @
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@ FIFO enabled...
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@ FIFO enabled...
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@ -80,6 +87,7 @@
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1001:
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1001:
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@ idle waiting for non fifo
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@ idle waiting for non fifo
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ldr \rd, [\rx, # S3C2410_UTRSTAT]
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ldr \rd, [\rx, # S3C2410_UTRSTAT]
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ARM_BE8(rev \rd, \rd)
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tst \rd, #S3C2410_UTRSTAT_TXFE
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tst \rd, #S3C2410_UTRSTAT_TXFE
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beq 1001b
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beq 1001b
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