KVM: ARM: VFP userspace interface
We use space #18 for floating point regs. Reviewed-by: Will Deacon <will.deacon@arm.com> Reviewed-by: Marcelo Tosatti <mtosatti@redhat.com> Signed-off-by: Rusty Russell <rusty@rustcorp.com.au> Signed-off-by: Christoffer Dall <c.dall@virtualopensystems.com>
This commit is contained in:
Rusty Russell
Christoffer Dall
parent
c27581ed32
commit
4fe21e4c6d
@ -1808,6 +1808,12 @@ ARM 64-bit CP15 registers have the following id bit patterns:
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ARM CCSIDR registers are demultiplexed by CSSELR value:
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0x4002 0000 0011 00 <csselr:8>
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ARM 32-bit VFP control registers have the following id bit patterns:
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0x4002 0000 0012 1 <regno:12>
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ARM 64-bit FP registers have the following id bit patterns:
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0x4002 0000 0012 0 <regno:12>
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4.69 KVM_GET_ONE_REG
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Capability: KVM_CAP_ONE_REG
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@ -112,6 +112,18 @@ struct kvm_arch_memory_slot {
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#define KVM_REG_ARM_DEMUX_VAL_MASK 0x00000000000000FF
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#define KVM_REG_ARM_DEMUX_VAL_SHIFT 0
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/* VFP registers: we could overload CP10 like ARM does, but that's ugly. */
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#define KVM_REG_ARM_VFP (0x0012 << KVM_REG_ARM_COPROC_SHIFT)
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#define KVM_REG_ARM_VFP_MASK 0x000000000000FFFF
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#define KVM_REG_ARM_VFP_BASE_REG 0x0
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#define KVM_REG_ARM_VFP_FPSID 0x1000
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#define KVM_REG_ARM_VFP_FPSCR 0x1001
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#define KVM_REG_ARM_VFP_MVFR1 0x1006
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#define KVM_REG_ARM_VFP_MVFR0 0x1007
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#define KVM_REG_ARM_VFP_FPEXC 0x1008
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#define KVM_REG_ARM_VFP_FPINST 0x1009
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#define KVM_REG_ARM_VFP_FPINST2 0x100A
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/* KVM_IRQ_LINE irq field index values */
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#define KVM_ARM_IRQ_TYPE_SHIFT 24
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@ -26,6 +26,8 @@
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#include <asm/cacheflush.h>
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#include <asm/cputype.h>
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#include <trace/events/kvm.h>
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#include <asm/vfp.h>
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#include "../vfp/vfpinstr.h"
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#include "trace.h"
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#include "coproc.h"
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@ -653,6 +655,170 @@ static int demux_c15_set(u64 id, void __user *uaddr)
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}
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}
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#ifdef CONFIG_VFPv3
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static const int vfp_sysregs[] = { KVM_REG_ARM_VFP_FPEXC,
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KVM_REG_ARM_VFP_FPSCR,
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KVM_REG_ARM_VFP_FPINST,
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KVM_REG_ARM_VFP_FPINST2,
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KVM_REG_ARM_VFP_MVFR0,
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KVM_REG_ARM_VFP_MVFR1,
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KVM_REG_ARM_VFP_FPSID };
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static unsigned int num_fp_regs(void)
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{
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if (((fmrx(MVFR0) & MVFR0_A_SIMD_MASK) >> MVFR0_A_SIMD_BIT) == 2)
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return 32;
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else
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return 16;
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}
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static unsigned int num_vfp_regs(void)
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{
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/* Normal FP regs + control regs. */
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return num_fp_regs() + ARRAY_SIZE(vfp_sysregs);
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}
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static int copy_vfp_regids(u64 __user *uindices)
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{
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unsigned int i;
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const u64 u32reg = KVM_REG_ARM | KVM_REG_SIZE_U32 | KVM_REG_ARM_VFP;
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const u64 u64reg = KVM_REG_ARM | KVM_REG_SIZE_U64 | KVM_REG_ARM_VFP;
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for (i = 0; i < num_fp_regs(); i++) {
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if (put_user((u64reg | KVM_REG_ARM_VFP_BASE_REG) + i,
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uindices))
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return -EFAULT;
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uindices++;
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}
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for (i = 0; i < ARRAY_SIZE(vfp_sysregs); i++) {
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if (put_user(u32reg | vfp_sysregs[i], uindices))
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return -EFAULT;
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uindices++;
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}
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return num_vfp_regs();
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}
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static int vfp_get_reg(const struct kvm_vcpu *vcpu, u64 id, void __user *uaddr)
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{
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u32 vfpid = (id & KVM_REG_ARM_VFP_MASK);
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u32 val;
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/* Fail if we have unknown bits set. */
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if (id & ~(KVM_REG_ARCH_MASK|KVM_REG_SIZE_MASK|KVM_REG_ARM_COPROC_MASK
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| ((1 << KVM_REG_ARM_COPROC_SHIFT)-1)))
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return -ENOENT;
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if (vfpid < num_fp_regs()) {
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if (KVM_REG_SIZE(id) != 8)
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return -ENOENT;
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return reg_to_user(uaddr, &vcpu->arch.vfp_guest.fpregs[vfpid],
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id);
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}
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/* FP control registers are all 32 bit. */
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if (KVM_REG_SIZE(id) != 4)
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return -ENOENT;
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switch (vfpid) {
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case KVM_REG_ARM_VFP_FPEXC:
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return reg_to_user(uaddr, &vcpu->arch.vfp_guest.fpexc, id);
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case KVM_REG_ARM_VFP_FPSCR:
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return reg_to_user(uaddr, &vcpu->arch.vfp_guest.fpscr, id);
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case KVM_REG_ARM_VFP_FPINST:
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return reg_to_user(uaddr, &vcpu->arch.vfp_guest.fpinst, id);
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case KVM_REG_ARM_VFP_FPINST2:
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return reg_to_user(uaddr, &vcpu->arch.vfp_guest.fpinst2, id);
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case KVM_REG_ARM_VFP_MVFR0:
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val = fmrx(MVFR0);
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return reg_to_user(uaddr, &val, id);
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case KVM_REG_ARM_VFP_MVFR1:
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val = fmrx(MVFR1);
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return reg_to_user(uaddr, &val, id);
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case KVM_REG_ARM_VFP_FPSID:
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val = fmrx(FPSID);
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return reg_to_user(uaddr, &val, id);
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default:
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return -ENOENT;
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}
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}
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static int vfp_set_reg(struct kvm_vcpu *vcpu, u64 id, const void __user *uaddr)
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{
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u32 vfpid = (id & KVM_REG_ARM_VFP_MASK);
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u32 val;
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/* Fail if we have unknown bits set. */
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if (id & ~(KVM_REG_ARCH_MASK|KVM_REG_SIZE_MASK|KVM_REG_ARM_COPROC_MASK
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| ((1 << KVM_REG_ARM_COPROC_SHIFT)-1)))
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return -ENOENT;
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if (vfpid < num_fp_regs()) {
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if (KVM_REG_SIZE(id) != 8)
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return -ENOENT;
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return reg_from_user(&vcpu->arch.vfp_guest.fpregs[vfpid],
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uaddr, id);
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}
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/* FP control registers are all 32 bit. */
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if (KVM_REG_SIZE(id) != 4)
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return -ENOENT;
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switch (vfpid) {
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case KVM_REG_ARM_VFP_FPEXC:
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return reg_from_user(&vcpu->arch.vfp_guest.fpexc, uaddr, id);
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case KVM_REG_ARM_VFP_FPSCR:
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return reg_from_user(&vcpu->arch.vfp_guest.fpscr, uaddr, id);
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case KVM_REG_ARM_VFP_FPINST:
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return reg_from_user(&vcpu->arch.vfp_guest.fpinst, uaddr, id);
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case KVM_REG_ARM_VFP_FPINST2:
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return reg_from_user(&vcpu->arch.vfp_guest.fpinst2, uaddr, id);
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/* These are invariant. */
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case KVM_REG_ARM_VFP_MVFR0:
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if (reg_from_user(&val, uaddr, id))
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return -EFAULT;
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if (val != fmrx(MVFR0))
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return -EINVAL;
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return 0;
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case KVM_REG_ARM_VFP_MVFR1:
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if (reg_from_user(&val, uaddr, id))
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return -EFAULT;
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if (val != fmrx(MVFR1))
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return -EINVAL;
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return 0;
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case KVM_REG_ARM_VFP_FPSID:
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if (reg_from_user(&val, uaddr, id))
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return -EFAULT;
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if (val != fmrx(FPSID))
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return -EINVAL;
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return 0;
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default:
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return -ENOENT;
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}
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}
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#else /* !CONFIG_VFPv3 */
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static unsigned int num_vfp_regs(void)
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{
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return 0;
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}
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static int copy_vfp_regids(u64 __user *uindices)
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{
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return 0;
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}
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static int vfp_get_reg(const struct kvm_vcpu *vcpu, u64 id, void __user *uaddr)
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{
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return -ENOENT;
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}
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static int vfp_set_reg(struct kvm_vcpu *vcpu, u64 id, const void __user *uaddr)
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{
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return -ENOENT;
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}
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#endif /* !CONFIG_VFPv3 */
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int kvm_arm_coproc_get_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
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{
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const struct coproc_reg *r;
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@ -661,6 +827,9 @@ int kvm_arm_coproc_get_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
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if ((reg->id & KVM_REG_ARM_COPROC_MASK) == KVM_REG_ARM_DEMUX)
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return demux_c15_get(reg->id, uaddr);
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if ((reg->id & KVM_REG_ARM_COPROC_MASK) == KVM_REG_ARM_VFP)
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return vfp_get_reg(vcpu, reg->id, uaddr);
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r = index_to_coproc_reg(vcpu, reg->id);
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if (!r)
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return get_invariant_cp15(reg->id, uaddr);
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@ -677,6 +846,9 @@ int kvm_arm_coproc_set_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
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if ((reg->id & KVM_REG_ARM_COPROC_MASK) == KVM_REG_ARM_DEMUX)
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return demux_c15_set(reg->id, uaddr);
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if ((reg->id & KVM_REG_ARM_COPROC_MASK) == KVM_REG_ARM_VFP)
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return vfp_set_reg(vcpu, reg->id, uaddr);
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r = index_to_coproc_reg(vcpu, reg->id);
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if (!r)
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return set_invariant_cp15(reg->id, uaddr);
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@ -788,6 +960,7 @@ unsigned long kvm_arm_num_coproc_regs(struct kvm_vcpu *vcpu)
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{
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return ARRAY_SIZE(invariant_cp15)
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+ num_demux_regs()
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+ num_vfp_regs()
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+ walk_cp15(vcpu, (u64 __user *)NULL);
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}
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@ -808,6 +981,11 @@ int kvm_arm_copy_coproc_indices(struct kvm_vcpu *vcpu, u64 __user *uindices)
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return err;
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uindices += err;
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err = copy_vfp_regids(uindices);
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if (err < 0)
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return err;
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uindices += err;
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return write_demux_regids(uindices);
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}
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