dmaengine: imx: Split device_control
Split the device_control callback of the Freescale IMX DMA driver to make use of the newly introduced callbacks, that will eventually be used to retrieve slave capabilities. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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@ -669,69 +669,67 @@ out:
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static int imxdma_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd,
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static int imxdma_terminate_all(struct dma_chan *chan)
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unsigned long arg)
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{
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{
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struct imxdma_channel *imxdmac = to_imxdma_chan(chan);
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struct imxdma_channel *imxdmac = to_imxdma_chan(chan);
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struct dma_slave_config *dmaengine_cfg = (void *)arg;
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struct imxdma_engine *imxdma = imxdmac->imxdma;
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struct imxdma_engine *imxdma = imxdmac->imxdma;
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unsigned long flags;
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unsigned long flags;
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imxdma_disable_hw(imxdmac);
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spin_lock_irqsave(&imxdma->lock, flags);
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list_splice_tail_init(&imxdmac->ld_active, &imxdmac->ld_free);
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list_splice_tail_init(&imxdmac->ld_queue, &imxdmac->ld_free);
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spin_unlock_irqrestore(&imxdma->lock, flags);
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return 0;
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}
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static int imxdma_config(struct dma_chan *chan,
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struct dma_slave_config *dmaengine_cfg)
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{
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struct imxdma_channel *imxdmac = to_imxdma_chan(chan);
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struct imxdma_engine *imxdma = imxdmac->imxdma;
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unsigned int mode = 0;
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unsigned int mode = 0;
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switch (cmd) {
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if (dmaengine_cfg->direction == DMA_DEV_TO_MEM) {
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case DMA_TERMINATE_ALL:
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imxdmac->per_address = dmaengine_cfg->src_addr;
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imxdma_disable_hw(imxdmac);
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imxdmac->watermark_level = dmaengine_cfg->src_maxburst;
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imxdmac->word_size = dmaengine_cfg->src_addr_width;
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spin_lock_irqsave(&imxdma->lock, flags);
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} else {
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list_splice_tail_init(&imxdmac->ld_active, &imxdmac->ld_free);
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imxdmac->per_address = dmaengine_cfg->dst_addr;
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list_splice_tail_init(&imxdmac->ld_queue, &imxdmac->ld_free);
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imxdmac->watermark_level = dmaengine_cfg->dst_maxburst;
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spin_unlock_irqrestore(&imxdma->lock, flags);
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imxdmac->word_size = dmaengine_cfg->dst_addr_width;
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return 0;
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case DMA_SLAVE_CONFIG:
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if (dmaengine_cfg->direction == DMA_DEV_TO_MEM) {
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imxdmac->per_address = dmaengine_cfg->src_addr;
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imxdmac->watermark_level = dmaengine_cfg->src_maxburst;
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imxdmac->word_size = dmaengine_cfg->src_addr_width;
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} else {
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imxdmac->per_address = dmaengine_cfg->dst_addr;
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imxdmac->watermark_level = dmaengine_cfg->dst_maxburst;
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imxdmac->word_size = dmaengine_cfg->dst_addr_width;
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}
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switch (imxdmac->word_size) {
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case DMA_SLAVE_BUSWIDTH_1_BYTE:
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mode = IMX_DMA_MEMSIZE_8;
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break;
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case DMA_SLAVE_BUSWIDTH_2_BYTES:
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mode = IMX_DMA_MEMSIZE_16;
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break;
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default:
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case DMA_SLAVE_BUSWIDTH_4_BYTES:
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mode = IMX_DMA_MEMSIZE_32;
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break;
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}
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imxdmac->hw_chaining = 0;
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imxdmac->ccr_from_device = (mode | IMX_DMA_TYPE_FIFO) |
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((IMX_DMA_MEMSIZE_32 | IMX_DMA_TYPE_LINEAR) << 2) |
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CCR_REN;
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imxdmac->ccr_to_device =
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(IMX_DMA_MEMSIZE_32 | IMX_DMA_TYPE_LINEAR) |
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((mode | IMX_DMA_TYPE_FIFO) << 2) | CCR_REN;
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imx_dmav1_writel(imxdma, imxdmac->dma_request,
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DMA_RSSR(imxdmac->channel));
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/* Set burst length */
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imx_dmav1_writel(imxdma, imxdmac->watermark_level *
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imxdmac->word_size, DMA_BLR(imxdmac->channel));
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return 0;
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default:
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return -ENOSYS;
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}
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}
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return -EINVAL;
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switch (imxdmac->word_size) {
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case DMA_SLAVE_BUSWIDTH_1_BYTE:
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mode = IMX_DMA_MEMSIZE_8;
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break;
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case DMA_SLAVE_BUSWIDTH_2_BYTES:
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mode = IMX_DMA_MEMSIZE_16;
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break;
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default:
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case DMA_SLAVE_BUSWIDTH_4_BYTES:
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mode = IMX_DMA_MEMSIZE_32;
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break;
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}
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imxdmac->hw_chaining = 0;
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imxdmac->ccr_from_device = (mode | IMX_DMA_TYPE_FIFO) |
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((IMX_DMA_MEMSIZE_32 | IMX_DMA_TYPE_LINEAR) << 2) |
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CCR_REN;
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imxdmac->ccr_to_device =
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(IMX_DMA_MEMSIZE_32 | IMX_DMA_TYPE_LINEAR) |
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((mode | IMX_DMA_TYPE_FIFO) << 2) | CCR_REN;
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imx_dmav1_writel(imxdma, imxdmac->dma_request,
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DMA_RSSR(imxdmac->channel));
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/* Set burst length */
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imx_dmav1_writel(imxdma, imxdmac->watermark_level *
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imxdmac->word_size, DMA_BLR(imxdmac->channel));
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return 0;
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}
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}
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static enum dma_status imxdma_tx_status(struct dma_chan *chan,
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static enum dma_status imxdma_tx_status(struct dma_chan *chan,
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@ -1184,7 +1182,8 @@ static int __init imxdma_probe(struct platform_device *pdev)
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imxdma->dma_device.device_prep_dma_cyclic = imxdma_prep_dma_cyclic;
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imxdma->dma_device.device_prep_dma_cyclic = imxdma_prep_dma_cyclic;
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imxdma->dma_device.device_prep_dma_memcpy = imxdma_prep_dma_memcpy;
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imxdma->dma_device.device_prep_dma_memcpy = imxdma_prep_dma_memcpy;
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imxdma->dma_device.device_prep_interleaved_dma = imxdma_prep_dma_interleaved;
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imxdma->dma_device.device_prep_interleaved_dma = imxdma_prep_dma_interleaved;
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imxdma->dma_device.device_control = imxdma_control;
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imxdma->dma_device.device_config = imxdma_config;
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imxdma->dma_device.device_terminate_all = imxdma_terminate_all;
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imxdma->dma_device.device_issue_pending = imxdma_issue_pending;
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imxdma->dma_device.device_issue_pending = imxdma_issue_pending;
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platform_set_drvdata(pdev, imxdma);
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platform_set_drvdata(pdev, imxdma);
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