dma: mmp_pdma: add support for cyclic DMA descriptors
Provide a callback to prepare cyclic DMA transfers. This is for instance needed for audio channel transport. Signed-off-by: Daniel Mack <zonque@gmail.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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@ -98,6 +98,9 @@ struct mmp_pdma_chan {
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struct mmp_pdma_phy *phy;
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struct mmp_pdma_phy *phy;
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enum dma_transfer_direction dir;
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enum dma_transfer_direction dir;
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struct mmp_pdma_desc_sw *cyclic_first; /* first desc_sw if channel
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* is in cyclic mode */
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/* channel's basic info */
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/* channel's basic info */
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struct tasklet_struct tasklet;
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struct tasklet_struct tasklet;
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u32 dcmd;
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u32 dcmd;
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@ -500,6 +503,8 @@ mmp_pdma_prep_memcpy(struct dma_chan *dchan,
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new->desc.ddadr = DDADR_STOP;
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new->desc.ddadr = DDADR_STOP;
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new->desc.dcmd |= DCMD_ENDIRQEN;
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new->desc.dcmd |= DCMD_ENDIRQEN;
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chan->cyclic_first = NULL;
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return &first->async_tx;
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return &first->async_tx;
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fail:
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fail:
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@ -575,6 +580,94 @@ mmp_pdma_prep_slave_sg(struct dma_chan *dchan, struct scatterlist *sgl,
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new->desc.ddadr = DDADR_STOP;
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new->desc.ddadr = DDADR_STOP;
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new->desc.dcmd |= DCMD_ENDIRQEN;
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new->desc.dcmd |= DCMD_ENDIRQEN;
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chan->dir = dir;
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chan->cyclic_first = NULL;
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return &first->async_tx;
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fail:
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if (first)
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mmp_pdma_free_desc_list(chan, &first->tx_list);
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return NULL;
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}
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static struct dma_async_tx_descriptor *mmp_pdma_prep_dma_cyclic(
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struct dma_chan *dchan, dma_addr_t buf_addr, size_t len,
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size_t period_len, enum dma_transfer_direction direction,
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unsigned long flags, void *context)
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{
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struct mmp_pdma_chan *chan;
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struct mmp_pdma_desc_sw *first = NULL, *prev = NULL, *new;
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dma_addr_t dma_src, dma_dst;
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if (!dchan || !len || !period_len)
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return NULL;
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/* the buffer length must be a multiple of period_len */
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if (len % period_len != 0)
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return NULL;
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if (period_len > PDMA_MAX_DESC_BYTES)
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return NULL;
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chan = to_mmp_pdma_chan(dchan);
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switch (direction) {
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case DMA_MEM_TO_DEV:
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dma_src = buf_addr;
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dma_dst = chan->dev_addr;
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break;
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case DMA_DEV_TO_MEM:
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dma_dst = buf_addr;
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dma_src = chan->dev_addr;
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break;
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default:
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dev_err(chan->dev, "Unsupported direction for cyclic DMA\n");
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return NULL;
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}
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chan->dir = direction;
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do {
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/* Allocate the link descriptor from DMA pool */
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new = mmp_pdma_alloc_descriptor(chan);
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if (!new) {
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dev_err(chan->dev, "no memory for desc\n");
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goto fail;
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}
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new->desc.dcmd = chan->dcmd | DCMD_ENDIRQEN |
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(DCMD_LENGTH & period_len);
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new->desc.dsadr = dma_src;
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new->desc.dtadr = dma_dst;
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if (!first)
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first = new;
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else
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prev->desc.ddadr = new->async_tx.phys;
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new->async_tx.cookie = 0;
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async_tx_ack(&new->async_tx);
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prev = new;
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len -= period_len;
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if (chan->dir == DMA_MEM_TO_DEV)
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dma_src += period_len;
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else
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dma_dst += period_len;
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/* Insert the link descriptor to the LD ring */
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list_add_tail(&new->node, &first->tx_list);
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} while (len);
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first->async_tx.flags = flags; /* client is in control of this ack */
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first->async_tx.cookie = -EBUSY;
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/* make the cyclic link */
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new->desc.ddadr = first->async_tx.phys;
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chan->cyclic_first = first;
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return &first->async_tx;
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return &first->async_tx;
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fail:
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fail:
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@ -681,8 +774,23 @@ static void dma_do_tasklet(unsigned long data)
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LIST_HEAD(chain_cleanup);
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LIST_HEAD(chain_cleanup);
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unsigned long flags;
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unsigned long flags;
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/* submit pending list; callback for each desc; free desc */
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if (chan->cyclic_first) {
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dma_async_tx_callback cb = NULL;
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void *cb_data = NULL;
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spin_lock_irqsave(&chan->desc_lock, flags);
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desc = chan->cyclic_first;
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cb = desc->async_tx.callback;
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cb_data = desc->async_tx.callback_param;
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spin_unlock_irqrestore(&chan->desc_lock, flags);
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if (cb)
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cb(cb_data);
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return;
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}
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/* submit pending list; callback for each desc; free desc */
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spin_lock_irqsave(&chan->desc_lock, flags);
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spin_lock_irqsave(&chan->desc_lock, flags);
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list_for_each_entry_safe(desc, _desc, &chan->chain_running, node) {
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list_for_each_entry_safe(desc, _desc, &chan->chain_running, node) {
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@ -876,12 +984,14 @@ static int mmp_pdma_probe(struct platform_device *op)
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dma_cap_set(DMA_SLAVE, pdev->device.cap_mask);
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dma_cap_set(DMA_SLAVE, pdev->device.cap_mask);
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dma_cap_set(DMA_MEMCPY, pdev->device.cap_mask);
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dma_cap_set(DMA_MEMCPY, pdev->device.cap_mask);
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dma_cap_set(DMA_CYCLIC, pdev->device.cap_mask);
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pdev->device.dev = &op->dev;
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pdev->device.dev = &op->dev;
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pdev->device.device_alloc_chan_resources = mmp_pdma_alloc_chan_resources;
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pdev->device.device_alloc_chan_resources = mmp_pdma_alloc_chan_resources;
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pdev->device.device_free_chan_resources = mmp_pdma_free_chan_resources;
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pdev->device.device_free_chan_resources = mmp_pdma_free_chan_resources;
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pdev->device.device_tx_status = mmp_pdma_tx_status;
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pdev->device.device_tx_status = mmp_pdma_tx_status;
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pdev->device.device_prep_dma_memcpy = mmp_pdma_prep_memcpy;
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pdev->device.device_prep_dma_memcpy = mmp_pdma_prep_memcpy;
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pdev->device.device_prep_slave_sg = mmp_pdma_prep_slave_sg;
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pdev->device.device_prep_slave_sg = mmp_pdma_prep_slave_sg;
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pdev->device.device_prep_dma_cyclic = mmp_pdma_prep_dma_cyclic;
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pdev->device.device_issue_pending = mmp_pdma_issue_pending;
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pdev->device.device_issue_pending = mmp_pdma_issue_pending;
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pdev->device.device_control = mmp_pdma_control;
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pdev->device.device_control = mmp_pdma_control;
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pdev->device.copy_align = PDMA_ALIGNMENT;
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pdev->device.copy_align = PDMA_ALIGNMENT;
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