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drm/i915/dsb: Add support for non-posted DSB registers writes

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Writing specific transcoder registers (and as it turns out, the
legacy LUT as well) via DSB needs a magic sequence to emit
non-posted register writes. Add a helper for this.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230606191504.18099-11-ville.syrjala@linux.intel.com
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
This commit is contained in:
Ville Syrjälä 2023-06-06 22:14:55 +03:00
parent e39845d651
commit 5053121b25
2 changed files with 23 additions and 0 deletions
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20
drivers/gpu/drm/i915/display/intel_dsb.c
View File

@ -261,6 +261,26 @@ void intel_dsb_noop(struct intel_dsb *dsb, int count)
DSB_OPCODE_NOOP << DSB_OPCODE_SHIFT);
}
void intel_dsb_nonpost_start(struct intel_dsb *dsb)
{
struct intel_crtc *crtc = dsb->crtc;
enum pipe pipe = crtc->pipe;
intel_dsb_reg_write_masked(dsb, DSB_CTRL(pipe, dsb->id),
DSB_NON_POSTED, DSB_NON_POSTED);
intel_dsb_noop(dsb, 4);
}
void intel_dsb_nonpost_end(struct intel_dsb *dsb)
{
struct intel_crtc *crtc = dsb->crtc;
enum pipe pipe = crtc->pipe;
intel_dsb_reg_write_masked(dsb, DSB_CTRL(pipe, dsb->id),
DSB_NON_POSTED, 0);
intel_dsb_noop(dsb, 4);
}
static void intel_dsb_align_tail(struct intel_dsb *dsb)
{
u32 aligned_tail, tail;

3
drivers/gpu/drm/i915/display/intel_dsb.h
View File

@ -22,6 +22,9 @@ void intel_dsb_reg_write(struct intel_dsb *dsb,
void intel_dsb_reg_write_masked(struct intel_dsb *dsb,
i915_reg_t reg, u32 mask, u32 val);
void intel_dsb_noop(struct intel_dsb *dsb, int count);
void intel_dsb_nonpost_start(struct intel_dsb *dsb);
void intel_dsb_nonpost_end(struct intel_dsb *dsb);
void intel_dsb_commit(struct intel_dsb *dsb,
bool wait_for_vblank);
void intel_dsb_wait(struct intel_dsb *dsb);