KVM: arm64: nv: Add FGT registers
Add the 5 registers covering FEAT_FGT. The AMU-related registers are currently left out as we don't have a plan for them. Yet. Reviewed-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Miguel Luis <miguel.luis@oracle.com> Reviewed-by: Jing Zhang <jingzhangos@google.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20230815183903.2735724-13-maz@kernel.org
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@ -400,6 +400,11 @@ enum vcpu_sysreg {
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TPIDR_EL2, /* EL2 Software Thread ID Register */
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CNTHCTL_EL2, /* Counter-timer Hypervisor Control register */
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SP_EL2, /* EL2 Stack Pointer */
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HFGRTR_EL2,
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HFGWTR_EL2,
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HFGITR_EL2,
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HDFGRTR_EL2,
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HDFGWTR_EL2,
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CNTHP_CTL_EL2,
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CNTHP_CVAL_EL2,
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CNTHV_CTL_EL2,
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@ -2367,6 +2367,9 @@ static const struct sys_reg_desc sys_reg_descs[] = {
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EL2_REG(MDCR_EL2, access_rw, reset_val, 0),
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EL2_REG(CPTR_EL2, access_rw, reset_val, CPTR_NVHE_EL2_RES1),
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EL2_REG(HSTR_EL2, access_rw, reset_val, 0),
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EL2_REG(HFGRTR_EL2, access_rw, reset_val, 0),
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EL2_REG(HFGWTR_EL2, access_rw, reset_val, 0),
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EL2_REG(HFGITR_EL2, access_rw, reset_val, 0),
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EL2_REG(HACR_EL2, access_rw, reset_val, 0),
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EL2_REG(TTBR0_EL2, access_rw, reset_val, 0),
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@ -2376,6 +2379,8 @@ static const struct sys_reg_desc sys_reg_descs[] = {
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EL2_REG(VTCR_EL2, access_rw, reset_val, 0),
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{ SYS_DESC(SYS_DACR32_EL2), NULL, reset_unknown, DACR32_EL2 },
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EL2_REG(HDFGRTR_EL2, access_rw, reset_val, 0),
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EL2_REG(HDFGWTR_EL2, access_rw, reset_val, 0),
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EL2_REG(SPSR_EL2, access_rw, reset_val, 0),
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EL2_REG(ELR_EL2, access_rw, reset_val, 0),
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{ SYS_DESC(SYS_SP_EL1), access_sp_el1},
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