mlxsw: reg: Add Tunnel Port Configuration Register
This register enables / disables learning on different types of tunnel ports (e.g., NVE, VPLS). Signed-off-by: Ido Schimmel <idosch@mellanox.com> Reviewed-by: Petr Machata <petrm@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -8476,6 +8476,51 @@ static inline void mlxsw_reg_tngcr_pack(char *payload,
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mlxsw_reg_tngcr_nve_group_size_flood_set(payload, 1);
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}
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/* TNPC - Tunnel Port Configuration Register
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* -----------------------------------------
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* The TNPC register is used for tunnel port configuration.
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* Reserved when Spectrum.
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*/
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#define MLXSW_REG_TNPC_ID 0xA020
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#define MLXSW_REG_TNPC_LEN 0x18
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MLXSW_REG_DEFINE(tnpc, MLXSW_REG_TNPC_ID, MLXSW_REG_TNPC_LEN);
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enum mlxsw_reg_tnpc_tunnel_port {
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MLXSW_REG_TNPC_TUNNEL_PORT_NVE,
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MLXSW_REG_TNPC_TUNNEL_PORT_VPLS,
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MLXSW_REG_TNPC_TUNNEL_FLEX_TUNNEL0,
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MLXSW_REG_TNPC_TUNNEL_FLEX_TUNNEL1,
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};
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/* reg_tnpc_tunnel_port
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* Tunnel port.
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* Access: Index
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*/
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MLXSW_ITEM32(reg, tnpc, tunnel_port, 0x00, 0, 4);
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/* reg_tnpc_learn_enable_v6
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* During IPv6 underlay decapsulation, whether to learn from tunnel port.
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* Access: RW
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*/
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MLXSW_ITEM32(reg, tnpc, learn_enable_v6, 0x04, 1, 1);
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/* reg_tnpc_learn_enable_v4
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* During IPv4 underlay decapsulation, whether to learn from tunnel port.
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* Access: RW
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*/
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MLXSW_ITEM32(reg, tnpc, learn_enable_v4, 0x04, 0, 1);
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static inline void mlxsw_reg_tnpc_pack(char *payload,
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enum mlxsw_reg_tnpc_tunnel_port tport,
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bool learn_enable)
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{
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MLXSW_REG_ZERO(tnpc, payload);
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mlxsw_reg_tnpc_tunnel_port_set(payload, tport);
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mlxsw_reg_tnpc_learn_enable_v4_set(payload, learn_enable);
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mlxsw_reg_tnpc_learn_enable_v6_set(payload, learn_enable);
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}
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/* TIGCR - Tunneling IPinIP General Configuration Register
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* -------------------------------------------------------
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* The TIGCR register is used for setting up the IPinIP Tunnel configuration.
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@ -9026,6 +9071,7 @@ static const struct mlxsw_reg_info *mlxsw_reg_infos[] = {
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MLXSW_REG(mcda),
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MLXSW_REG(mgpc),
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MLXSW_REG(tngcr),
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MLXSW_REG(tnpc),
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MLXSW_REG(tigcr),
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MLXSW_REG(sbpr),
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MLXSW_REG(sbcm),
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