sfc: Update MCDI protocol definitions
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
This commit is contained in:
Ben Hutchings
parent
2d9955bedb
commit
512bb06c65
@ -224,6 +224,8 @@
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#define MC_CMD_ERR_MAC_EXIST 0x1009
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/* Slave core not present */
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#define MC_CMD_ERR_SLAVE_NOT_PRESENT 0x100a
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/* The datapath is disabled. */
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#define MC_CMD_ERR_DATAPATH_DISABLED 0x100b
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#define MC_CMD_ERR_CODE_OFST 0
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@ -390,6 +392,8 @@
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* AOE_ERR_DATA)
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*/
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#define MCDI_EVENT_AOE_BYTEBLASTER 0x9
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/* enum: DDR ECC status update */
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#define MCDI_EVENT_AOE_DDR_ECC_STATUS 0xa
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#define MCDI_EVENT_AOE_ERR_DATA_LBN 8
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#define MCDI_EVENT_AOE_ERR_DATA_WIDTH 8
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#define MCDI_EVENT_RX_ERR_RXQ_LBN 0
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@ -462,6 +466,10 @@
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#define MCDI_EVENT_CODE_ECC_CORR_ERR 0x17
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/* enum: the MC has detected an uncorrectable error */
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#define MCDI_EVENT_CODE_ECC_FATAL_ERR 0x18
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/* enum: The MC has entered offline BIST mode */
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#define MCDI_EVENT_CODE_MC_BIST 0x19
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/* enum: PTP tick event providing current NIC time */
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#define MCDI_EVENT_CODE_PTP_TIME 0x1a
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/* enum: Artificial event generated by host and posted via MC for test
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* purposes.
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*/
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@ -481,15 +489,32 @@
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#define MCDI_EVENT_TX_ERR_DATA_OFST 0
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#define MCDI_EVENT_TX_ERR_DATA_LBN 0
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#define MCDI_EVENT_TX_ERR_DATA_WIDTH 32
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/* Seconds field of timestamp */
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/* For CODE_PTP_RX, CODE_PTP_PPS and CODE_HW_PPS events the seconds field of
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* timestamp
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*/
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#define MCDI_EVENT_PTP_SECONDS_OFST 0
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#define MCDI_EVENT_PTP_SECONDS_LBN 0
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#define MCDI_EVENT_PTP_SECONDS_WIDTH 32
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/* Nanoseconds field of timestamp */
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/* For CODE_PTP_RX, CODE_PTP_PPS and CODE_HW_PPS events the major field of
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* timestamp
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*/
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#define MCDI_EVENT_PTP_MAJOR_OFST 0
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#define MCDI_EVENT_PTP_MAJOR_LBN 0
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#define MCDI_EVENT_PTP_MAJOR_WIDTH 32
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/* For CODE_PTP_RX, CODE_PTP_PPS and CODE_HW_PPS events the nanoseconds field
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* of timestamp
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*/
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#define MCDI_EVENT_PTP_NANOSECONDS_OFST 0
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#define MCDI_EVENT_PTP_NANOSECONDS_LBN 0
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#define MCDI_EVENT_PTP_NANOSECONDS_WIDTH 32
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/* Lowest four bytes of sourceUUID from PTP packet */
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/* For CODE_PTP_RX, CODE_PTP_PPS and CODE_HW_PPS events the minor field of
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* timestamp
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*/
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#define MCDI_EVENT_PTP_MINOR_OFST 0
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#define MCDI_EVENT_PTP_MINOR_LBN 0
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#define MCDI_EVENT_PTP_MINOR_WIDTH 32
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/* For CODE_PTP_RX events, the lowest four bytes of sourceUUID from PTP packet
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*/
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#define MCDI_EVENT_PTP_UUID_OFST 0
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#define MCDI_EVENT_PTP_UUID_LBN 0
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#define MCDI_EVENT_PTP_UUID_WIDTH 32
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@ -505,6 +530,13 @@
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#define MCDI_EVENT_ECC_FATAL_ERR_DATA_OFST 0
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#define MCDI_EVENT_ECC_FATAL_ERR_DATA_LBN 0
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#define MCDI_EVENT_ECC_FATAL_ERR_DATA_WIDTH 32
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/* For CODE_PTP_TIME events, the major value of the PTP clock */
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#define MCDI_EVENT_PTP_TIME_MAJOR_OFST 0
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#define MCDI_EVENT_PTP_TIME_MAJOR_LBN 0
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#define MCDI_EVENT_PTP_TIME_MAJOR_WIDTH 32
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/* For CODE_PTP_TIME events, bits 19-26 of the minor value of the PTP clock */
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#define MCDI_EVENT_PTP_TIME_MINOR_26_19_LBN 36
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#define MCDI_EVENT_PTP_TIME_MINOR_26_19_WIDTH 8
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/* FCDI_EVENT structuredef */
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#define FCDI_EVENT_LEN 8
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@ -545,8 +577,10 @@
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#define FCDI_EVENT_CODE_TIMED_READ 0x5
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/* enum: One or more PPS IN events */
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#define FCDI_EVENT_CODE_PPS_IN 0x6
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/* enum: One or more PPS OUT events */
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#define FCDI_EVENT_CODE_PPS_OUT 0x7
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/* enum: Tick event from PTP clock */
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#define FCDI_EVENT_CODE_PTP_TICK 0x7
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/* enum: ECC error counters */
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#define FCDI_EVENT_CODE_DDR_ECC_STATUS 0x8
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#define FCDI_EVENT_ASSERT_INSTR_ADDRESS_OFST 0
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#define FCDI_EVENT_ASSERT_INSTR_ADDRESS_LBN 0
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#define FCDI_EVENT_ASSERT_INSTR_ADDRESS_WIDTH 32
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@ -560,14 +594,21 @@
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#define FCDI_EVENT_LINK_STATE_DATA_OFST 0
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#define FCDI_EVENT_LINK_STATE_DATA_LBN 0
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#define FCDI_EVENT_LINK_STATE_DATA_WIDTH 32
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#define FCDI_EVENT_PPS_COUNT_OFST 0
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#define FCDI_EVENT_PPS_COUNT_LBN 0
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#define FCDI_EVENT_PPS_COUNT_WIDTH 32
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#define FCDI_EVENT_DDR_ECC_STATUS_BANK_ID_LBN 36
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#define FCDI_EVENT_DDR_ECC_STATUS_BANK_ID_WIDTH 8
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#define FCDI_EVENT_DDR_ECC_STATUS_STATUS_OFST 0
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#define FCDI_EVENT_DDR_ECC_STATUS_STATUS_LBN 0
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#define FCDI_EVENT_DDR_ECC_STATUS_STATUS_WIDTH 32
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/* FCDI_EXTENDED_EVENT structuredef */
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#define FCDI_EXTENDED_EVENT_LENMIN 16
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#define FCDI_EXTENDED_EVENT_LENMAX 248
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#define FCDI_EXTENDED_EVENT_LEN(num) (8+8*(num))
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/* FCDI_EXTENDED_EVENT_PPS structuredef: Extended FCDI event to send PPS events
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* to the MC. Note that this structure | is overlayed over a normal FCDI event
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* such that bits 32-63 containing | event code, level, source etc remain the
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* same. In this case the data | field of the header is defined to be the
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* number of timestamps
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*/
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#define FCDI_EXTENDED_EVENT_PPS_LENMIN 16
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#define FCDI_EXTENDED_EVENT_PPS_LENMAX 248
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#define FCDI_EXTENDED_EVENT_PPS_LEN(num) (8+8*(num))
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/* Number of timestamps following */
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#define FCDI_EXTENDED_EVENT_PPS_COUNT_OFST 0
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#define FCDI_EXTENDED_EVENT_PPS_COUNT_LBN 0
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@ -581,14 +622,14 @@
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#define FCDI_EXTENDED_EVENT_PPS_NANOSECONDS_LBN 96
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#define FCDI_EXTENDED_EVENT_PPS_NANOSECONDS_WIDTH 32
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/* Timestamp records comprising the event */
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#define FCDI_EXTENDED_EVENT_PPS_TIME_OFST 8
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#define FCDI_EXTENDED_EVENT_PPS_TIME_LEN 8
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#define FCDI_EXTENDED_EVENT_PPS_TIME_LO_OFST 8
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#define FCDI_EXTENDED_EVENT_PPS_TIME_HI_OFST 12
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#define FCDI_EXTENDED_EVENT_PPS_TIME_MINNUM 1
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#define FCDI_EXTENDED_EVENT_PPS_TIME_MAXNUM 30
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#define FCDI_EXTENDED_EVENT_PPS_TIME_LBN 64
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#define FCDI_EXTENDED_EVENT_PPS_TIME_WIDTH 64
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#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_OFST 8
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#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_LEN 8
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#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_LO_OFST 8
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#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_HI_OFST 12
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#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_MINNUM 1
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#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_MAXNUM 30
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#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_LBN 64
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#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_WIDTH 64
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/***********************************/
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@ -642,6 +683,10 @@
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#define MC_CMD_COPYCODE_IN_LEN 16
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/* Source address */
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#define MC_CMD_COPYCODE_IN_SRC_ADDR_OFST 0
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/* enum: The main image should be entered via a copy of a single word from and
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* to this address when none of the other magic behaviours are required.
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*/
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#define MC_CMD_COPYCODE_HUNT_NO_MAGIC_ADDR 0x10000
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/* enum: Entering the main image via a copy of a single word from and to this
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* address indicates that it should not attempt to start the datapath CPUs.
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* This is useful for certain soft rebooting scenarios. (Huntington only)
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@ -872,8 +917,28 @@
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#define MC_CMD_PTP_OP_RST_CLK 0x14
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/* enum: Enable the forwarding of PPS events to the host */
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#define MC_CMD_PTP_OP_PPS_ENABLE 0x15
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/* enum: Get the time format used by this NIC for PTP operations */
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#define MC_CMD_PTP_OP_GET_TIME_FORMAT 0x16
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/* enum: Get the clock attributes. NOTE- extended version of
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* MC_CMD_PTP_OP_GET_TIME_FORMAT
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*/
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#define MC_CMD_PTP_OP_GET_ATTRIBUTES 0x16
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/* enum: Get corrections that should be applied to the various different
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* timestamps
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*/
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#define MC_CMD_PTP_OP_GET_TIMESTAMP_CORRECTIONS 0x17
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/* enum: Subscribe to receive periodic time events indicating the current NIC
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* time
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*/
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#define MC_CMD_PTP_OP_TIME_EVENT_SUBSCRIBE 0x18
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/* enum: Unsubscribe to stop receiving time events */
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#define MC_CMD_PTP_OP_TIME_EVENT_UNSUBSCRIBE 0x19
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/* enum: PPS based manfacturing tests. Requires PPS output to be looped to PPS
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* input on the same NIC.
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*/
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#define MC_CMD_PTP_OP_MANFTEST_PPS 0x1a
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/* enum: Above this for future use. */
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#define MC_CMD_PTP_OP_MAX 0x16
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#define MC_CMD_PTP_OP_MAX 0x1b
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/* MC_CMD_PTP_IN_ENABLE msgrequest */
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#define MC_CMD_PTP_IN_ENABLE_LEN 16
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@ -938,8 +1003,12 @@
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#define MC_CMD_PTP_IN_ADJUST_BITS 0x28
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/* Time adjustment in seconds */
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#define MC_CMD_PTP_IN_ADJUST_SECONDS_OFST 16
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/* Time adjustment major value */
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#define MC_CMD_PTP_IN_ADJUST_MAJOR_OFST 16
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/* Time adjustment in nanoseconds */
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#define MC_CMD_PTP_IN_ADJUST_NANOSECONDS_OFST 20
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/* Time adjustment minor value */
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#define MC_CMD_PTP_IN_ADJUST_MINOR_OFST 20
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/* MC_CMD_PTP_IN_SYNCHRONIZE msgrequest */
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#define MC_CMD_PTP_IN_SYNCHRONIZE_LEN 20
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@ -1005,8 +1074,12 @@
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/* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */
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/* Time adjustment in seconds */
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#define MC_CMD_PTP_IN_CLOCK_OFFSET_ADJUST_SECONDS_OFST 8
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/* Time adjustment major value */
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#define MC_CMD_PTP_IN_CLOCK_OFFSET_ADJUST_MAJOR_OFST 8
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/* Time adjustment in nanoseconds */
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#define MC_CMD_PTP_IN_CLOCK_OFFSET_ADJUST_NANOSECONDS_OFST 12
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/* Time adjustment minor value */
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#define MC_CMD_PTP_IN_CLOCK_OFFSET_ADJUST_MINOR_OFST 12
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/* MC_CMD_PTP_IN_CLOCK_FREQ_ADJUST msgrequest */
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#define MC_CMD_PTP_IN_CLOCK_FREQ_ADJUST_LEN 16
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@ -1078,9 +1151,51 @@
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#define MC_CMD_PTP_ENABLE_PPS 0x0
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/* enum: Disable */
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#define MC_CMD_PTP_DISABLE_PPS 0x1
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/* Queueid to send events back */
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/* Queue id to send events back */
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#define MC_CMD_PTP_IN_PPS_ENABLE_QUEUE_ID_OFST 8
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/* MC_CMD_PTP_IN_GET_TIME_FORMAT msgrequest */
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#define MC_CMD_PTP_IN_GET_TIME_FORMAT_LEN 8
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/* MC_CMD_PTP_IN_CMD_OFST 0 */
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/* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */
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/* MC_CMD_PTP_IN_GET_ATTRIBUTES msgrequest */
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#define MC_CMD_PTP_IN_GET_ATTRIBUTES_LEN 8
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/* MC_CMD_PTP_IN_CMD_OFST 0 */
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/* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */
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/* MC_CMD_PTP_IN_GET_TIMESTAMP_CORRECTIONS msgrequest */
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#define MC_CMD_PTP_IN_GET_TIMESTAMP_CORRECTIONS_LEN 8
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/* MC_CMD_PTP_IN_CMD_OFST 0 */
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/* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */
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/* MC_CMD_PTP_IN_TIME_EVENT_SUBSCRIBE msgrequest */
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#define MC_CMD_PTP_IN_TIME_EVENT_SUBSCRIBE_LEN 12
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/* MC_CMD_PTP_IN_CMD_OFST 0 */
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/* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */
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/* Event queue to send PTP time events to */
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#define MC_CMD_PTP_IN_TIME_EVENT_SUBSCRIBE_QUEUE_OFST 8
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/* MC_CMD_PTP_IN_TIME_EVENT_UNSUBSCRIBE msgrequest */
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#define MC_CMD_PTP_IN_TIME_EVENT_UNSUBSCRIBE_LEN 16
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/* MC_CMD_PTP_IN_CMD_OFST 0 */
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/* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */
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/* Unsubscribe options */
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#define MC_CMD_PTP_IN_TIME_EVENT_UNSUBSCRIBE_CONTROL_OFST 8
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/* enum: Unsubscribe a single queue */
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#define MC_CMD_PTP_IN_TIME_EVENT_UNSUBSCRIBE_SINGLE 0x0
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/* enum: Unsubscribe all queues */
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#define MC_CMD_PTP_IN_TIME_EVENT_UNSUBSCRIBE_ALL 0x1
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/* Event queue ID */
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#define MC_CMD_PTP_IN_TIME_EVENT_UNSUBSCRIBE_QUEUE_OFST 12
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/* MC_CMD_PTP_IN_MANFTEST_PPS msgrequest */
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#define MC_CMD_PTP_IN_MANFTEST_PPS_LEN 12
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/* MC_CMD_PTP_IN_CMD_OFST 0 */
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/* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */
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/* 1 to enable PPS test mode, 0 to disable and return result. */
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#define MC_CMD_PTP_IN_MANFTEST_PPS_TEST_ENABLE_OFST 8
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/* MC_CMD_PTP_OUT msgresponse */
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#define MC_CMD_PTP_OUT_LEN 0
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@ -1088,15 +1203,29 @@
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#define MC_CMD_PTP_OUT_TRANSMIT_LEN 8
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/* Value of seconds timestamp */
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#define MC_CMD_PTP_OUT_TRANSMIT_SECONDS_OFST 0
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/* Timestamp major value */
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#define MC_CMD_PTP_OUT_TRANSMIT_MAJOR_OFST 0
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/* Value of nanoseconds timestamp */
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#define MC_CMD_PTP_OUT_TRANSMIT_NANOSECONDS_OFST 4
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/* Timestamp minor value */
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#define MC_CMD_PTP_OUT_TRANSMIT_MINOR_OFST 4
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/* MC_CMD_PTP_OUT_TIME_EVENT_SUBSCRIBE msgresponse */
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#define MC_CMD_PTP_OUT_TIME_EVENT_SUBSCRIBE_LEN 0
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/* MC_CMD_PTP_OUT_TIME_EVENT_UNSUBSCRIBE msgresponse */
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#define MC_CMD_PTP_OUT_TIME_EVENT_UNSUBSCRIBE_LEN 0
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/* MC_CMD_PTP_OUT_READ_NIC_TIME msgresponse */
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#define MC_CMD_PTP_OUT_READ_NIC_TIME_LEN 8
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/* Value of seconds timestamp */
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#define MC_CMD_PTP_OUT_READ_NIC_TIME_SECONDS_OFST 0
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/* Timestamp major value */
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#define MC_CMD_PTP_OUT_READ_NIC_TIME_MAJOR_OFST 0
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/* Value of nanoseconds timestamp */
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#define MC_CMD_PTP_OUT_READ_NIC_TIME_NANOSECONDS_OFST 4
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/* Timestamp minor value */
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#define MC_CMD_PTP_OUT_READ_NIC_TIME_MINOR_OFST 4
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/* MC_CMD_PTP_OUT_STATUS msgresponse */
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#define MC_CMD_PTP_OUT_STATUS_LEN 64
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@ -1116,21 +1245,21 @@
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#define MC_CMD_PTP_OUT_STATUS_STATS_PPS_OFLOW_OFST 24
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/* Number of PPS bad periods */
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#define MC_CMD_PTP_OUT_STATUS_STATS_PPS_BAD_OFST 28
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/* Minimum period of PPS pulse */
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/* Minimum period of PPS pulse in nanoseconds */
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#define MC_CMD_PTP_OUT_STATUS_STATS_PPS_PER_MIN_OFST 32
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/* Maximum period of PPS pulse */
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/* Maximum period of PPS pulse in nanoseconds */
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#define MC_CMD_PTP_OUT_STATUS_STATS_PPS_PER_MAX_OFST 36
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/* Last period of PPS pulse */
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/* Last period of PPS pulse in nanoseconds */
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#define MC_CMD_PTP_OUT_STATUS_STATS_PPS_PER_LAST_OFST 40
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/* Mean period of PPS pulse */
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/* Mean period of PPS pulse in nanoseconds */
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#define MC_CMD_PTP_OUT_STATUS_STATS_PPS_PER_MEAN_OFST 44
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/* Minimum offset of PPS pulse (signed) */
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/* Minimum offset of PPS pulse in nanoseconds (signed) */
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#define MC_CMD_PTP_OUT_STATUS_STATS_PPS_OFF_MIN_OFST 48
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/* Maximum offset of PPS pulse (signed) */
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/* Maximum offset of PPS pulse in nanoseconds (signed) */
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#define MC_CMD_PTP_OUT_STATUS_STATS_PPS_OFF_MAX_OFST 52
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/* Last offset of PPS pulse (signed) */
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/* Last offset of PPS pulse in nanoseconds (signed) */
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#define MC_CMD_PTP_OUT_STATUS_STATS_PPS_OFF_LAST_OFST 56
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/* Mean offset of PPS pulse (signed) */
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/* Mean offset of PPS pulse in nanoseconds (signed) */
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#define MC_CMD_PTP_OUT_STATUS_STATS_PPS_OFF_MEAN_OFST 60
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/* MC_CMD_PTP_OUT_SYNCHRONIZE msgresponse */
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@ -1146,8 +1275,12 @@
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#define MC_CMD_PTP_OUT_SYNCHRONIZE_HOSTSTART_OFST 0
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/* Value of seconds timestamp */
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#define MC_CMD_PTP_OUT_SYNCHRONIZE_SECONDS_OFST 4
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/* Timestamp major value */
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#define MC_CMD_PTP_OUT_SYNCHRONIZE_MAJOR_OFST 4
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/* Value of nanoseconds timestamp */
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#define MC_CMD_PTP_OUT_SYNCHRONIZE_NANOSECONDS_OFST 8
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/* Timestamp minor value */
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#define MC_CMD_PTP_OUT_SYNCHRONIZE_MINOR_OFST 8
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/* Host time immediately after NIC's hardware clock read */
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#define MC_CMD_PTP_OUT_SYNCHRONIZE_HOSTEND_OFST 12
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/* Number of nanoseconds waited after reading NIC's hardware clock */
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@ -1177,6 +1310,16 @@
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#define MC_CMD_PTP_MANF_PACKET_ENOUGH 0x8
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/* enum: Timestamp trigger GPIO not working */
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#define MC_CMD_PTP_MANF_GPIO_TRIGGER 0x9
|
||||
/* enum: Insufficient PPS events to perform checks */
|
||||
#define MC_CMD_PTP_MANF_PPS_ENOUGH 0xa
|
||||
/* enum: PPS time event period not sufficiently close to 1s. */
|
||||
#define MC_CMD_PTP_MANF_PPS_PERIOD 0xb
|
||||
/* enum: PPS time event nS reading not sufficiently close to zero. */
|
||||
#define MC_CMD_PTP_MANF_PPS_NS 0xc
|
||||
/* enum: PTP peripheral registers incorrect */
|
||||
#define MC_CMD_PTP_MANF_REGISTERS 0xd
|
||||
/* enum: Failed to read time from PTP peripheral */
|
||||
#define MC_CMD_PTP_MANF_CLOCK_READ 0xe
|
||||
/* Presence of external oscillator */
|
||||
#define MC_CMD_PTP_OUT_MANFTEST_BASIC_TEST_EXTOSC_OFST 4
|
||||
|
||||
@ -1198,6 +1341,62 @@
|
||||
#define MC_CMD_PTP_OUT_FPGAREAD_BUFFER_MINNUM 1
|
||||
#define MC_CMD_PTP_OUT_FPGAREAD_BUFFER_MAXNUM 252
|
||||
|
||||
/* MC_CMD_PTP_OUT_GET_TIME_FORMAT msgresponse */
|
||||
#define MC_CMD_PTP_OUT_GET_TIME_FORMAT_LEN 4
|
||||
/* Time format required/used by for this NIC. Applies to all PTP MCDI
|
||||
* operations that pass times between the host and firmware. If this operation
|
||||
* is not supported (older firmware) a format of seconds and nanoseconds should
|
||||
* be assumed.
|
||||
*/
|
||||
#define MC_CMD_PTP_OUT_GET_TIME_FORMAT_FORMAT_OFST 0
|
||||
/* enum: Times are in seconds and nanoseconds */
|
||||
#define MC_CMD_PTP_OUT_GET_TIME_FORMAT_SECONDS_NANOSECONDS 0x0
|
||||
/* enum: Major register has units of 16 second per tick, minor 8 ns per tick */
|
||||
#define MC_CMD_PTP_OUT_GET_TIME_FORMAT_16SECONDS_8NANOSECONDS 0x1
|
||||
/* enum: Major register has units of seconds, minor 2^-27s per tick */
|
||||
#define MC_CMD_PTP_OUT_GET_TIME_FORMAT_SECONDS_27FRACTION 0x2
|
||||
|
||||
/* MC_CMD_PTP_OUT_GET_ATTRIBUTES msgresponse */
|
||||
#define MC_CMD_PTP_OUT_GET_ATTRIBUTES_LEN 8
|
||||
/* Time format required/used by for this NIC. Applies to all PTP MCDI
|
||||
* operations that pass times between the host and firmware. If this operation
|
||||
* is not supported (older firmware) a format of seconds and nanoseconds should
|
||||
* be assumed.
|
||||
*/
|
||||
#define MC_CMD_PTP_OUT_GET_ATTRIBUTES_TIME_FORMAT_OFST 0
|
||||
/* enum: Times are in seconds and nanoseconds */
|
||||
#define MC_CMD_PTP_OUT_GET_ATTRIBUTES_SECONDS_NANOSECONDS 0x0
|
||||
/* enum: Major register has units of 16 second per tick, minor 8 ns per tick */
|
||||
#define MC_CMD_PTP_OUT_GET_ATTRIBUTES_16SECONDS_8NANOSECONDS 0x1
|
||||
/* enum: Major register has units of seconds, minor 2^-27s per tick */
|
||||
#define MC_CMD_PTP_OUT_GET_ATTRIBUTES_SECONDS_27FRACTION 0x2
|
||||
/* Minimum acceptable value for a corrected synchronization timeset. When
|
||||
* comparing host and NIC clock times, the MC returns a set of samples that
|
||||
* contain the host start and end time, the MC time when the host start was
|
||||
* detected and the time the MC waited between reading the time and detecting
|
||||
* the host end. The corrected sync window is the difference between the host
|
||||
* end and start times minus the time that the MC waited for host end.
|
||||
*/
|
||||
#define MC_CMD_PTP_OUT_GET_ATTRIBUTES_SYNC_WINDOW_MIN_OFST 4
|
||||
|
||||
/* MC_CMD_PTP_OUT_GET_TIMESTAMP_CORRECTIONS msgresponse */
|
||||
#define MC_CMD_PTP_OUT_GET_TIMESTAMP_CORRECTIONS_LEN 16
|
||||
/* Uncorrected error on transmit timestamps in NIC clock format */
|
||||
#define MC_CMD_PTP_OUT_GET_TIMESTAMP_CORRECTIONS_TRANSMIT_OFST 0
|
||||
/* Uncorrected error on receive timestamps in NIC clock format */
|
||||
#define MC_CMD_PTP_OUT_GET_TIMESTAMP_CORRECTIONS_RECEIVE_OFST 4
|
||||
/* Uncorrected error on PPS output in NIC clock format */
|
||||
#define MC_CMD_PTP_OUT_GET_TIMESTAMP_CORRECTIONS_PPS_OUT_OFST 8
|
||||
/* Uncorrected error on PPS input in NIC clock format */
|
||||
#define MC_CMD_PTP_OUT_GET_TIMESTAMP_CORRECTIONS_PPS_IN_OFST 12
|
||||
|
||||
/* MC_CMD_PTP_OUT_MANFTEST_PPS msgresponse */
|
||||
#define MC_CMD_PTP_OUT_MANFTEST_PPS_LEN 4
|
||||
/* Results of testing */
|
||||
#define MC_CMD_PTP_OUT_MANFTEST_PPS_TEST_RESULT_OFST 0
|
||||
/* Enum values, see field(s): */
|
||||
/* MC_CMD_PTP_OUT_MANFTEST_BASIC/TEST_RESULT */
|
||||
|
||||
|
||||
/***********************************/
|
||||
/* MC_CMD_CSR_READ32
|
||||
@ -1923,6 +2122,8 @@
|
||||
#define MC_CMD_MEDIA_SFP_PLUS 0x5
|
||||
/* enum: 10GBaseT. */
|
||||
#define MC_CMD_MEDIA_BASE_T 0x6
|
||||
/* enum: QSFP+. */
|
||||
#define MC_CMD_MEDIA_QSFP_PLUS 0x7
|
||||
#define MC_CMD_GET_PHY_CFG_OUT_MMD_MASK_OFST 48
|
||||
/* enum: Native clause 22 */
|
||||
#define MC_CMD_MMD_CLAUSE22 0x0
|
||||
@ -2223,6 +2424,8 @@
|
||||
#define MC_CMD_LOOPBACK_SD_FEP_WS 0x21
|
||||
/* enum: KR Serdes Serial Wireside. */
|
||||
#define MC_CMD_LOOPBACK_SD_FES_WS 0x22
|
||||
/* enum: Near side of AOE Siena side port */
|
||||
#define MC_CMD_LOOPBACK_AOE_INT_NEAR 0x23
|
||||
/* Supported loopbacks. */
|
||||
#define MC_CMD_GET_LOOPBACK_MODES_OUT_1G_OFST 8
|
||||
#define MC_CMD_GET_LOOPBACK_MODES_OUT_1G_LEN 8
|
||||
@ -2286,6 +2489,10 @@
|
||||
#define MC_CMD_GET_LINK_OUT_BPX_LINK_WIDTH 1
|
||||
#define MC_CMD_GET_LINK_OUT_PHY_LINK_LBN 3
|
||||
#define MC_CMD_GET_LINK_OUT_PHY_LINK_WIDTH 1
|
||||
#define MC_CMD_GET_LINK_OUT_LINK_FAULT_RX_LBN 6
|
||||
#define MC_CMD_GET_LINK_OUT_LINK_FAULT_RX_WIDTH 1
|
||||
#define MC_CMD_GET_LINK_OUT_LINK_FAULT_TX_LBN 7
|
||||
#define MC_CMD_GET_LINK_OUT_LINK_FAULT_TX_WIDTH 1
|
||||
/* This returns the negotiated flow control value. */
|
||||
#define MC_CMD_GET_LINK_OUT_FCNTL_OFST 20
|
||||
/* enum: Flow control is off. */
|
||||
@ -3175,7 +3382,7 @@
|
||||
#define MC_CMD_SENSOR_INFO_EXT_IN_PAGE_OFST 0
|
||||
|
||||
/* MC_CMD_SENSOR_INFO_OUT msgresponse */
|
||||
#define MC_CMD_SENSOR_INFO_OUT_LENMIN 12
|
||||
#define MC_CMD_SENSOR_INFO_OUT_LENMIN 4
|
||||
#define MC_CMD_SENSOR_INFO_OUT_LENMAX 252
|
||||
#define MC_CMD_SENSOR_INFO_OUT_LEN(num) (4+8*(num))
|
||||
#define MC_CMD_SENSOR_INFO_OUT_MASK_OFST 0
|
||||
@ -3269,16 +3476,18 @@
|
||||
#define MC_CMD_SENSOR_VDD08D_VSS08D_CSR 0x2b
|
||||
/* enum: voltage between VSS08D and VSS08D at CSR (external ADC): mV */
|
||||
#define MC_CMD_SENSOR_VDD08D_VSS08D_CSR_EXTADC 0x2c
|
||||
/* enum: Hotpoint temperature: degC */
|
||||
#define MC_CMD_SENSOR_HOTPOINT_TEMP 0x2d
|
||||
/* MC_CMD_SENSOR_INFO_ENTRY_TYPEDEF */
|
||||
#define MC_CMD_SENSOR_ENTRY_OFST 4
|
||||
#define MC_CMD_SENSOR_ENTRY_LEN 8
|
||||
#define MC_CMD_SENSOR_ENTRY_LO_OFST 4
|
||||
#define MC_CMD_SENSOR_ENTRY_HI_OFST 8
|
||||
#define MC_CMD_SENSOR_ENTRY_MINNUM 1
|
||||
#define MC_CMD_SENSOR_ENTRY_MINNUM 0
|
||||
#define MC_CMD_SENSOR_ENTRY_MAXNUM 31
|
||||
|
||||
/* MC_CMD_SENSOR_INFO_EXT_OUT msgresponse */
|
||||
#define MC_CMD_SENSOR_INFO_EXT_OUT_LENMIN 12
|
||||
#define MC_CMD_SENSOR_INFO_EXT_OUT_LENMIN 4
|
||||
#define MC_CMD_SENSOR_INFO_EXT_OUT_LENMAX 252
|
||||
#define MC_CMD_SENSOR_INFO_EXT_OUT_LEN(num) (4+8*(num))
|
||||
#define MC_CMD_SENSOR_INFO_EXT_OUT_MASK_OFST 0
|
||||
@ -3291,7 +3500,7 @@
|
||||
/* MC_CMD_SENSOR_ENTRY_LEN 8 */
|
||||
/* MC_CMD_SENSOR_ENTRY_LO_OFST 4 */
|
||||
/* MC_CMD_SENSOR_ENTRY_HI_OFST 8 */
|
||||
/* MC_CMD_SENSOR_ENTRY_MINNUM 1 */
|
||||
/* MC_CMD_SENSOR_ENTRY_MINNUM 0 */
|
||||
/* MC_CMD_SENSOR_ENTRY_MAXNUM 31 */
|
||||
|
||||
/* MC_CMD_SENSOR_INFO_ENTRY_TYPEDEF structuredef */
|
||||
@ -3864,6 +4073,18 @@
|
||||
#define NVRAM_PARTITION_TYPE_ID_LBN 0
|
||||
#define NVRAM_PARTITION_TYPE_ID_WIDTH 16
|
||||
|
||||
/* LICENSED_APP_ID structuredef */
|
||||
#define LICENSED_APP_ID_LEN 4
|
||||
#define LICENSED_APP_ID_ID_OFST 0
|
||||
/* enum: OpenOnload */
|
||||
#define LICENSED_APP_ID_ONLOAD 0x1
|
||||
/* enum: PTP timestamping */
|
||||
#define LICENSED_APP_ID_PTP 0x2
|
||||
/* enum: SolarCapture Pro */
|
||||
#define LICENSED_APP_ID_SOLARCAPTURE_PRO 0x4
|
||||
#define LICENSED_APP_ID_ID_LBN 0
|
||||
#define LICENSED_APP_ID_ID_WIDTH 32
|
||||
|
||||
|
||||
/***********************************/
|
||||
/* MC_CMD_READ_REGS
|
||||
@ -4021,6 +4242,8 @@
|
||||
#define MC_CMD_INIT_RXQ_IN_FLAG_CHAIN_WIDTH 1
|
||||
#define MC_CMD_INIT_RXQ_IN_FLAG_PREFIX_LBN 8
|
||||
#define MC_CMD_INIT_RXQ_IN_FLAG_PREFIX_WIDTH 1
|
||||
#define MC_CMD_INIT_RXQ_IN_FLAG_DISABLE_SCATTER_LBN 9
|
||||
#define MC_CMD_INIT_RXQ_IN_FLAG_DISABLE_SCATTER_WIDTH 1
|
||||
/* Owner ID to use if in buffer mode (zero if physical) */
|
||||
#define MC_CMD_INIT_RXQ_IN_OWNER_ID_OFST 20
|
||||
/* The port ID associated with the v-adaptor which should contain this DMAQ. */
|
||||
@ -4179,6 +4402,9 @@
|
||||
#define MC_CMD_PROXY_CMD_IN_TARGET_VF_WIDTH 16
|
||||
#define MC_CMD_PROXY_CMD_IN_VF_NULL 0xffff /* enum */
|
||||
|
||||
/* MC_CMD_PROXY_CMD_OUT msgresponse */
|
||||
#define MC_CMD_PROXY_CMD_OUT_LEN 0
|
||||
|
||||
|
||||
/***********************************/
|
||||
/* MC_CMD_ALLOC_BUFTBL_CHUNK
|
||||
@ -4213,7 +4439,7 @@
|
||||
|
||||
/* MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN msgrequest */
|
||||
#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_LENMIN 20
|
||||
#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_LENMAX 252
|
||||
#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_LENMAX 268
|
||||
#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_LEN(num) (12+8*(num))
|
||||
#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_HANDLE_OFST 0
|
||||
/* ID */
|
||||
@ -4226,7 +4452,7 @@
|
||||
#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_LO_OFST 12
|
||||
#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_HI_OFST 16
|
||||
#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_MINNUM 1
|
||||
#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_MAXNUM 30
|
||||
#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_MAXNUM 32
|
||||
|
||||
/* MC_CMD_PROGRAM_BUFTBL_ENTRIES_OUT msgresponse */
|
||||
#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_OUT_LEN 0
|
||||
@ -6799,6 +7025,30 @@
|
||||
#define MC_CMD_TRIGGER_INTERRUPT_OUT_LEN 0
|
||||
|
||||
|
||||
/***********************************/
|
||||
/* MC_CMD_CAP_BLK_READ
|
||||
* Read multiple 64bit words from capture block memory
|
||||
*/
|
||||
#define MC_CMD_CAP_BLK_READ 0xe7
|
||||
|
||||
/* MC_CMD_CAP_BLK_READ_IN msgrequest */
|
||||
#define MC_CMD_CAP_BLK_READ_IN_LEN 12
|
||||
#define MC_CMD_CAP_BLK_READ_IN_CAP_REG_OFST 0
|
||||
#define MC_CMD_CAP_BLK_READ_IN_ADDR_OFST 4
|
||||
#define MC_CMD_CAP_BLK_READ_IN_COUNT_OFST 8
|
||||
|
||||
/* MC_CMD_CAP_BLK_READ_OUT msgresponse */
|
||||
#define MC_CMD_CAP_BLK_READ_OUT_LENMIN 8
|
||||
#define MC_CMD_CAP_BLK_READ_OUT_LENMAX 248
|
||||
#define MC_CMD_CAP_BLK_READ_OUT_LEN(num) (0+8*(num))
|
||||
#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_OFST 0
|
||||
#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_LEN 8
|
||||
#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_LO_OFST 0
|
||||
#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_HI_OFST 4
|
||||
#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_MINNUM 1
|
||||
#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_MAXNUM 31
|
||||
|
||||
|
||||
/***********************************/
|
||||
/* MC_CMD_DUMP_DO
|
||||
* Take a dump of the DUT state
|
||||
@ -6826,6 +7076,10 @@
|
||||
#define MC_CMD_DUMP_DO_IN_DUMPSPEC_SRC_CUSTOM_HOST_MEMORY_MLI_DEPTH_OFST 20
|
||||
#define MC_CMD_DUMP_DO_IN_HOST_MEMORY_MLI_MAX_DEPTH 0x2 /* enum */
|
||||
#define MC_CMD_DUMP_DO_IN_DUMPSPEC_SRC_CUSTOM_UART_PORT_OFST 12
|
||||
/* enum: The uart port this command was received over (if using a uart
|
||||
* transport)
|
||||
*/
|
||||
#define MC_CMD_DUMP_DO_IN_UART_PORT_SRC 0xff
|
||||
#define MC_CMD_DUMP_DO_IN_DUMPSPEC_SRC_CUSTOM_SIZE_OFST 24
|
||||
#define MC_CMD_DUMP_DO_IN_DUMPFILE_DST_OFST 28
|
||||
#define MC_CMD_DUMP_DO_IN_DUMPFILE_DST_CUSTOM 0x0 /* enum */
|
||||
@ -6942,39 +7196,68 @@
|
||||
|
||||
|
||||
/***********************************/
|
||||
/* MC_CMD_START_KR_EYE_PLOT
|
||||
* Start KR Serdes Eye diagram plot on a given lane. Lane must have valid
|
||||
* signal.
|
||||
/* MC_CMD_UART_SEND_DATA
|
||||
* Send checksummed[sic] block of data over the uart. Response is a placeholder
|
||||
* should we wish to make this reliable; currently requests are fire-and-
|
||||
* forget.
|
||||
*/
|
||||
#define MC_CMD_START_KR_EYE_PLOT 0xee
|
||||
#define MC_CMD_UART_SEND_DATA 0xee
|
||||
|
||||
/* MC_CMD_START_KR_EYE_PLOT_IN msgrequest */
|
||||
#define MC_CMD_START_KR_EYE_PLOT_IN_LEN 4
|
||||
#define MC_CMD_START_KR_EYE_PLOT_IN_LANE_OFST 0
|
||||
/* MC_CMD_UART_SEND_DATA_OUT msgrequest */
|
||||
#define MC_CMD_UART_SEND_DATA_OUT_LENMIN 16
|
||||
#define MC_CMD_UART_SEND_DATA_OUT_LENMAX 252
|
||||
#define MC_CMD_UART_SEND_DATA_OUT_LEN(num) (16+1*(num))
|
||||
/* CRC32 over OFFSET, LENGTH, RESERVED, DATA */
|
||||
#define MC_CMD_UART_SEND_DATA_OUT_CHECKSUM_OFST 0
|
||||
/* Offset at which to write the data */
|
||||
#define MC_CMD_UART_SEND_DATA_OUT_OFFSET_OFST 4
|
||||
/* Length of data */
|
||||
#define MC_CMD_UART_SEND_DATA_OUT_LENGTH_OFST 8
|
||||
/* Reserved for future use */
|
||||
#define MC_CMD_UART_SEND_DATA_OUT_RESERVED_OFST 12
|
||||
#define MC_CMD_UART_SEND_DATA_OUT_DATA_OFST 16
|
||||
#define MC_CMD_UART_SEND_DATA_OUT_DATA_LEN 1
|
||||
#define MC_CMD_UART_SEND_DATA_OUT_DATA_MINNUM 0
|
||||
#define MC_CMD_UART_SEND_DATA_OUT_DATA_MAXNUM 236
|
||||
|
||||
/* MC_CMD_START_KR_EYE_PLOT_OUT msgresponse */
|
||||
#define MC_CMD_START_KR_EYE_PLOT_OUT_LEN 0
|
||||
/* MC_CMD_UART_SEND_DATA_IN msgresponse */
|
||||
#define MC_CMD_UART_SEND_DATA_IN_LEN 0
|
||||
|
||||
|
||||
/***********************************/
|
||||
/* MC_CMD_POLL_KR_EYE_PLOT
|
||||
* Poll KR Serdes Eye diagram plot. Returns one row of BER data. The caller
|
||||
* should call this command repeatedly after starting eye plot, until no more
|
||||
* data is returned.
|
||||
/* MC_CMD_UART_RECV_DATA
|
||||
* Request checksummed[sic] block of data over the uart. Only a placeholder,
|
||||
* subject to change and not currently implemented.
|
||||
*/
|
||||
#define MC_CMD_POLL_KR_EYE_PLOT 0xef
|
||||
#define MC_CMD_UART_RECV_DATA 0xef
|
||||
|
||||
/* MC_CMD_POLL_KR_EYE_PLOT_IN msgrequest */
|
||||
#define MC_CMD_POLL_KR_EYE_PLOT_IN_LEN 0
|
||||
/* MC_CMD_UART_RECV_DATA_OUT msgrequest */
|
||||
#define MC_CMD_UART_RECV_DATA_OUT_LEN 16
|
||||
/* CRC32 over OFFSET, LENGTH, RESERVED */
|
||||
#define MC_CMD_UART_RECV_DATA_OUT_CHECKSUM_OFST 0
|
||||
/* Offset from which to read the data */
|
||||
#define MC_CMD_UART_RECV_DATA_OUT_OFFSET_OFST 4
|
||||
/* Length of data */
|
||||
#define MC_CMD_UART_RECV_DATA_OUT_LENGTH_OFST 8
|
||||
/* Reserved for future use */
|
||||
#define MC_CMD_UART_RECV_DATA_OUT_RESERVED_OFST 12
|
||||
|
||||
/* MC_CMD_POLL_KR_EYE_PLOT_OUT msgresponse */
|
||||
#define MC_CMD_POLL_KR_EYE_PLOT_OUT_LENMIN 0
|
||||
#define MC_CMD_POLL_KR_EYE_PLOT_OUT_LENMAX 252
|
||||
#define MC_CMD_POLL_KR_EYE_PLOT_OUT_LEN(num) (0+2*(num))
|
||||
#define MC_CMD_POLL_KR_EYE_PLOT_OUT_SAMPLES_OFST 0
|
||||
#define MC_CMD_POLL_KR_EYE_PLOT_OUT_SAMPLES_LEN 2
|
||||
#define MC_CMD_POLL_KR_EYE_PLOT_OUT_SAMPLES_MINNUM 0
|
||||
#define MC_CMD_POLL_KR_EYE_PLOT_OUT_SAMPLES_MAXNUM 126
|
||||
/* MC_CMD_UART_RECV_DATA_IN msgresponse */
|
||||
#define MC_CMD_UART_RECV_DATA_IN_LENMIN 16
|
||||
#define MC_CMD_UART_RECV_DATA_IN_LENMAX 252
|
||||
#define MC_CMD_UART_RECV_DATA_IN_LEN(num) (16+1*(num))
|
||||
/* CRC32 over RESERVED1, RESERVED2, RESERVED3, DATA */
|
||||
#define MC_CMD_UART_RECV_DATA_IN_CHECKSUM_OFST 0
|
||||
/* Offset at which to write the data */
|
||||
#define MC_CMD_UART_RECV_DATA_IN_RESERVED1_OFST 4
|
||||
/* Length of data */
|
||||
#define MC_CMD_UART_RECV_DATA_IN_RESERVED2_OFST 8
|
||||
/* Reserved for future use */
|
||||
#define MC_CMD_UART_RECV_DATA_IN_RESERVED3_OFST 12
|
||||
#define MC_CMD_UART_RECV_DATA_IN_DATA_OFST 16
|
||||
#define MC_CMD_UART_RECV_DATA_IN_DATA_LEN 1
|
||||
#define MC_CMD_UART_RECV_DATA_IN_DATA_MINNUM 0
|
||||
#define MC_CMD_UART_RECV_DATA_IN_DATA_MAXNUM 236
|
||||
|
||||
|
||||
/***********************************/
|
||||
@ -7026,6 +7309,15 @@
|
||||
#define MC_CMD_KR_TUNE_IN_TXEQ_SET 0x3
|
||||
/* enum: Force KR Serdes reset / recalibration */
|
||||
#define MC_CMD_KR_TUNE_IN_RECAL 0x4
|
||||
/* enum: Start KR Serdes Eye diagram plot on a given lane. Lane must have valid
|
||||
* signal.
|
||||
*/
|
||||
#define MC_CMD_KR_TUNE_IN_START_EYE_PLOT 0x5
|
||||
/* enum: Poll KR Serdes Eye diagram plot. Returns one row of BER data. The
|
||||
* caller should call this command repeatedly after starting eye plot, until no
|
||||
* more data is returned.
|
||||
*/
|
||||
#define MC_CMD_KR_TUNE_IN_POLL_EYE_PLOT 0x6
|
||||
/* Align the arguments to 32 bits */
|
||||
#define MC_CMD_KR_TUNE_IN_KR_TUNE_RSVD_OFST 1
|
||||
#define MC_CMD_KR_TUNE_IN_KR_TUNE_RSVD_LEN 3
|
||||
@ -7123,6 +7415,91 @@
|
||||
/* MC_CMD_KR_TUNE_RXEQ_SET_OUT msgresponse */
|
||||
#define MC_CMD_KR_TUNE_RXEQ_SET_OUT_LEN 0
|
||||
|
||||
/* MC_CMD_KR_TUNE_TXEQ_GET_IN msgrequest */
|
||||
#define MC_CMD_KR_TUNE_TXEQ_GET_IN_LEN 4
|
||||
/* Requested operation */
|
||||
#define MC_CMD_KR_TUNE_TXEQ_GET_IN_KR_TUNE_OP_OFST 0
|
||||
#define MC_CMD_KR_TUNE_TXEQ_GET_IN_KR_TUNE_OP_LEN 1
|
||||
/* Align the arguments to 32 bits */
|
||||
#define MC_CMD_KR_TUNE_TXEQ_GET_IN_KR_TUNE_RSVD_OFST 1
|
||||
#define MC_CMD_KR_TUNE_TXEQ_GET_IN_KR_TUNE_RSVD_LEN 3
|
||||
|
||||
/* MC_CMD_KR_TUNE_TXEQ_GET_OUT msgresponse */
|
||||
#define MC_CMD_KR_TUNE_TXEQ_GET_OUT_LENMIN 4
|
||||
#define MC_CMD_KR_TUNE_TXEQ_GET_OUT_LENMAX 252
|
||||
#define MC_CMD_KR_TUNE_TXEQ_GET_OUT_LEN(num) (0+4*(num))
|
||||
/* TXEQ Parameter */
|
||||
#define MC_CMD_KR_TUNE_TXEQ_GET_OUT_PARAM_OFST 0
|
||||
#define MC_CMD_KR_TUNE_TXEQ_GET_OUT_PARAM_LEN 4
|
||||
#define MC_CMD_KR_TUNE_TXEQ_GET_OUT_PARAM_MINNUM 1
|
||||
#define MC_CMD_KR_TUNE_TXEQ_GET_OUT_PARAM_MAXNUM 63
|
||||
#define MC_CMD_KR_TUNE_TXEQ_GET_OUT_PARAM_ID_LBN 0
|
||||
#define MC_CMD_KR_TUNE_TXEQ_GET_OUT_PARAM_ID_WIDTH 8
|
||||
/* enum: TX Amplitude */
|
||||
#define MC_CMD_KR_TUNE_TXEQ_GET_OUT_TX_LEV 0x0
|
||||
/* enum: De-Emphasis Tap1 Magnitude (0-7) */
|
||||
#define MC_CMD_KR_TUNE_TXEQ_GET_OUT_TX_MODE 0x1
|
||||
/* enum: De-Emphasis Tap1 Fine */
|
||||
#define MC_CMD_KR_TUNE_TXEQ_GET_OUT_TX_DTLEV 0x2
|
||||
/* enum: De-Emphasis Tap2 Magnitude (0-6) */
|
||||
#define MC_CMD_KR_TUNE_TXEQ_GET_OUT_TX_D2 0x3
|
||||
/* enum: De-Emphasis Tap2 Fine */
|
||||
#define MC_CMD_KR_TUNE_TXEQ_GET_OUT_TX_D2TLEV 0x4
|
||||
/* enum: Pre-Emphasis Magnitude */
|
||||
#define MC_CMD_KR_TUNE_TXEQ_GET_OUT_TX_E 0x5
|
||||
/* enum: Pre-Emphasis Fine */
|
||||
#define MC_CMD_KR_TUNE_TXEQ_GET_OUT_TX_ETLEV 0x6
|
||||
/* enum: TX Slew Rate Coarse control */
|
||||
#define MC_CMD_KR_TUNE_TXEQ_GET_OUT_TX_PREDRV_DLY 0x7
|
||||
/* enum: TX Slew Rate Fine control */
|
||||
#define MC_CMD_KR_TUNE_TXEQ_GET_OUT_TX_SR_SET 0x8
|
||||
#define MC_CMD_KR_TUNE_TXEQ_GET_OUT_PARAM_LANE_LBN 8
|
||||
#define MC_CMD_KR_TUNE_TXEQ_GET_OUT_PARAM_LANE_WIDTH 3
|
||||
#define MC_CMD_KR_TUNE_TXEQ_GET_OUT_LANE_0 0x0 /* enum */
|
||||
#define MC_CMD_KR_TUNE_TXEQ_GET_OUT_LANE_1 0x1 /* enum */
|
||||
#define MC_CMD_KR_TUNE_TXEQ_GET_OUT_LANE_2 0x2 /* enum */
|
||||
#define MC_CMD_KR_TUNE_TXEQ_GET_OUT_LANE_3 0x3 /* enum */
|
||||
#define MC_CMD_KR_TUNE_TXEQ_GET_OUT_LANE_ALL 0x4 /* enum */
|
||||
#define MC_CMD_KR_TUNE_TXEQ_GET_OUT_RESERVED_LBN 11
|
||||
#define MC_CMD_KR_TUNE_TXEQ_GET_OUT_RESERVED_WIDTH 5
|
||||
#define MC_CMD_KR_TUNE_TXEQ_GET_OUT_PARAM_INITIAL_LBN 16
|
||||
#define MC_CMD_KR_TUNE_TXEQ_GET_OUT_PARAM_INITIAL_WIDTH 8
|
||||
#define MC_CMD_KR_TUNE_TXEQ_GET_OUT_RESERVED2_LBN 24
|
||||
#define MC_CMD_KR_TUNE_TXEQ_GET_OUT_RESERVED2_WIDTH 8
|
||||
|
||||
/* MC_CMD_KR_TUNE_TXEQ_SET_IN msgrequest */
|
||||
#define MC_CMD_KR_TUNE_TXEQ_SET_IN_LENMIN 8
|
||||
#define MC_CMD_KR_TUNE_TXEQ_SET_IN_LENMAX 252
|
||||
#define MC_CMD_KR_TUNE_TXEQ_SET_IN_LEN(num) (4+4*(num))
|
||||
/* Requested operation */
|
||||
#define MC_CMD_KR_TUNE_TXEQ_SET_IN_KR_TUNE_OP_OFST 0
|
||||
#define MC_CMD_KR_TUNE_TXEQ_SET_IN_KR_TUNE_OP_LEN 1
|
||||
/* Align the arguments to 32 bits */
|
||||
#define MC_CMD_KR_TUNE_TXEQ_SET_IN_KR_TUNE_RSVD_OFST 1
|
||||
#define MC_CMD_KR_TUNE_TXEQ_SET_IN_KR_TUNE_RSVD_LEN 3
|
||||
/* TXEQ Parameter */
|
||||
#define MC_CMD_KR_TUNE_TXEQ_SET_IN_PARAM_OFST 4
|
||||
#define MC_CMD_KR_TUNE_TXEQ_SET_IN_PARAM_LEN 4
|
||||
#define MC_CMD_KR_TUNE_TXEQ_SET_IN_PARAM_MINNUM 1
|
||||
#define MC_CMD_KR_TUNE_TXEQ_SET_IN_PARAM_MAXNUM 62
|
||||
#define MC_CMD_KR_TUNE_TXEQ_SET_IN_PARAM_ID_LBN 0
|
||||
#define MC_CMD_KR_TUNE_TXEQ_SET_IN_PARAM_ID_WIDTH 8
|
||||
/* Enum values, see field(s): */
|
||||
/* MC_CMD_KR_TUNE_TXEQ_GET_OUT/PARAM_ID */
|
||||
#define MC_CMD_KR_TUNE_TXEQ_SET_IN_PARAM_LANE_LBN 8
|
||||
#define MC_CMD_KR_TUNE_TXEQ_SET_IN_PARAM_LANE_WIDTH 3
|
||||
/* Enum values, see field(s): */
|
||||
/* MC_CMD_KR_TUNE_TXEQ_GET_OUT/PARAM_LANE */
|
||||
#define MC_CMD_KR_TUNE_TXEQ_SET_IN_RESERVED_LBN 11
|
||||
#define MC_CMD_KR_TUNE_TXEQ_SET_IN_RESERVED_WIDTH 5
|
||||
#define MC_CMD_KR_TUNE_TXEQ_SET_IN_PARAM_INITIAL_LBN 16
|
||||
#define MC_CMD_KR_TUNE_TXEQ_SET_IN_PARAM_INITIAL_WIDTH 8
|
||||
#define MC_CMD_KR_TUNE_TXEQ_SET_IN_RESERVED2_LBN 24
|
||||
#define MC_CMD_KR_TUNE_TXEQ_SET_IN_RESERVED2_WIDTH 8
|
||||
|
||||
/* MC_CMD_KR_TUNE_TXEQ_SET_OUT msgresponse */
|
||||
#define MC_CMD_KR_TUNE_TXEQ_SET_OUT_LEN 0
|
||||
|
||||
/* MC_CMD_KR_TUNE_RECAL_IN msgrequest */
|
||||
#define MC_CMD_KR_TUNE_RECAL_IN_LEN 4
|
||||
/* Requested operation */
|
||||
@ -7135,6 +7512,37 @@
|
||||
/* MC_CMD_KR_TUNE_RECAL_OUT msgresponse */
|
||||
#define MC_CMD_KR_TUNE_RECAL_OUT_LEN 0
|
||||
|
||||
/* MC_CMD_KR_TUNE_START_EYE_PLOT_IN msgrequest */
|
||||
#define MC_CMD_KR_TUNE_START_EYE_PLOT_IN_LEN 8
|
||||
/* Requested operation */
|
||||
#define MC_CMD_KR_TUNE_START_EYE_PLOT_IN_KR_TUNE_OP_OFST 0
|
||||
#define MC_CMD_KR_TUNE_START_EYE_PLOT_IN_KR_TUNE_OP_LEN 1
|
||||
/* Align the arguments to 32 bits */
|
||||
#define MC_CMD_KR_TUNE_START_EYE_PLOT_IN_KR_TUNE_RSVD_OFST 1
|
||||
#define MC_CMD_KR_TUNE_START_EYE_PLOT_IN_KR_TUNE_RSVD_LEN 3
|
||||
#define MC_CMD_KR_TUNE_START_EYE_PLOT_IN_LANE_OFST 4
|
||||
|
||||
/* MC_CMD_KR_TUNE_START_EYE_PLOT_OUT msgresponse */
|
||||
#define MC_CMD_KR_TUNE_START_EYE_PLOT_OUT_LEN 0
|
||||
|
||||
/* MC_CMD_KR_TUNE_POLL_EYE_PLOT_IN msgrequest */
|
||||
#define MC_CMD_KR_TUNE_POLL_EYE_PLOT_IN_LEN 4
|
||||
/* Requested operation */
|
||||
#define MC_CMD_KR_TUNE_POLL_EYE_PLOT_IN_KR_TUNE_OP_OFST 0
|
||||
#define MC_CMD_KR_TUNE_POLL_EYE_PLOT_IN_KR_TUNE_OP_LEN 1
|
||||
/* Align the arguments to 32 bits */
|
||||
#define MC_CMD_KR_TUNE_POLL_EYE_PLOT_IN_KR_TUNE_RSVD_OFST 1
|
||||
#define MC_CMD_KR_TUNE_POLL_EYE_PLOT_IN_KR_TUNE_RSVD_LEN 3
|
||||
|
||||
/* MC_CMD_KR_TUNE_POLL_EYE_PLOT_OUT msgresponse */
|
||||
#define MC_CMD_KR_TUNE_POLL_EYE_PLOT_OUT_LENMIN 0
|
||||
#define MC_CMD_KR_TUNE_POLL_EYE_PLOT_OUT_LENMAX 252
|
||||
#define MC_CMD_KR_TUNE_POLL_EYE_PLOT_OUT_LEN(num) (0+2*(num))
|
||||
#define MC_CMD_KR_TUNE_POLL_EYE_PLOT_OUT_SAMPLES_OFST 0
|
||||
#define MC_CMD_KR_TUNE_POLL_EYE_PLOT_OUT_SAMPLES_LEN 2
|
||||
#define MC_CMD_KR_TUNE_POLL_EYE_PLOT_OUT_SAMPLES_MINNUM 0
|
||||
#define MC_CMD_KR_TUNE_POLL_EYE_PLOT_OUT_SAMPLES_MAXNUM 126
|
||||
|
||||
|
||||
/***********************************/
|
||||
/* MC_CMD_PCIE_TUNE
|
||||
@ -7157,6 +7565,13 @@
|
||||
#define MC_CMD_PCIE_TUNE_IN_TXEQ_GET 0x2
|
||||
/* enum: Override TX Driver settings */
|
||||
#define MC_CMD_PCIE_TUNE_IN_TXEQ_SET 0x3
|
||||
/* enum: Start PCIe Serdes Eye diagram plot on a given lane. */
|
||||
#define MC_CMD_PCIE_TUNE_IN_START_EYE_PLOT 0x5
|
||||
/* enum: Poll PCIe Serdes Eye diagram plot. Returns one row of BER data. The
|
||||
* caller should call this command repeatedly after starting eye plot, until no
|
||||
* more data is returned.
|
||||
*/
|
||||
#define MC_CMD_PCIE_TUNE_IN_POLL_EYE_PLOT 0x6
|
||||
/* Align the arguments to 32 bits */
|
||||
#define MC_CMD_PCIE_TUNE_IN_PCIE_TUNE_RSVD_OFST 1
|
||||
#define MC_CMD_PCIE_TUNE_IN_PCIE_TUNE_RSVD_LEN 3
|
||||
@ -7258,6 +7673,37 @@
|
||||
#define MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_PARAM_CURRENT_LBN 24
|
||||
#define MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_PARAM_CURRENT_WIDTH 8
|
||||
|
||||
/* MC_CMD_PCIE_TUNE_START_EYE_PLOT_IN msgrequest */
|
||||
#define MC_CMD_PCIE_TUNE_START_EYE_PLOT_IN_LEN 8
|
||||
/* Requested operation */
|
||||
#define MC_CMD_PCIE_TUNE_START_EYE_PLOT_IN_PCIE_TUNE_OP_OFST 0
|
||||
#define MC_CMD_PCIE_TUNE_START_EYE_PLOT_IN_PCIE_TUNE_OP_LEN 1
|
||||
/* Align the arguments to 32 bits */
|
||||
#define MC_CMD_PCIE_TUNE_START_EYE_PLOT_IN_PCIE_TUNE_RSVD_OFST 1
|
||||
#define MC_CMD_PCIE_TUNE_START_EYE_PLOT_IN_PCIE_TUNE_RSVD_LEN 3
|
||||
#define MC_CMD_PCIE_TUNE_START_EYE_PLOT_IN_LANE_OFST 4
|
||||
|
||||
/* MC_CMD_PCIE_TUNE_START_EYE_PLOT_OUT msgresponse */
|
||||
#define MC_CMD_PCIE_TUNE_START_EYE_PLOT_OUT_LEN 0
|
||||
|
||||
/* MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_IN msgrequest */
|
||||
#define MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_IN_LEN 4
|
||||
/* Requested operation */
|
||||
#define MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_IN_PCIE_TUNE_OP_OFST 0
|
||||
#define MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_IN_PCIE_TUNE_OP_LEN 1
|
||||
/* Align the arguments to 32 bits */
|
||||
#define MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_IN_PCIE_TUNE_RSVD_OFST 1
|
||||
#define MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_IN_PCIE_TUNE_RSVD_LEN 3
|
||||
|
||||
/* MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_OUT msgresponse */
|
||||
#define MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_OUT_LENMIN 0
|
||||
#define MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_OUT_LENMAX 252
|
||||
#define MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_OUT_LEN(num) (0+2*(num))
|
||||
#define MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_OUT_SAMPLES_OFST 0
|
||||
#define MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_OUT_SAMPLES_LEN 2
|
||||
#define MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_OUT_SAMPLES_MINNUM 0
|
||||
#define MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_OUT_SAMPLES_MAXNUM 126
|
||||
|
||||
|
||||
/***********************************/
|
||||
/* MC_CMD_LICENSING
|
||||
@ -7310,5 +7756,152 @@
|
||||
*/
|
||||
#define MC_CMD_MC2MC_PROXY 0xf4
|
||||
|
||||
/* MC_CMD_MC2MC_PROXY_IN msgrequest */
|
||||
#define MC_CMD_MC2MC_PROXY_IN_LEN 0
|
||||
|
||||
/* MC_CMD_MC2MC_PROXY_OUT msgresponse */
|
||||
#define MC_CMD_MC2MC_PROXY_OUT_LEN 0
|
||||
|
||||
|
||||
/***********************************/
|
||||
/* MC_CMD_GET_LICENSED_APP_STATE
|
||||
* Query the state of an individual licensed application. (Note that the actual
|
||||
* state may be invalidated by the MC_CMD_LICENSING OP_UPDATE_LICENSE operation
|
||||
* or a reboot of the MC.)
|
||||
*/
|
||||
#define MC_CMD_GET_LICENSED_APP_STATE 0xf5
|
||||
|
||||
/* MC_CMD_GET_LICENSED_APP_STATE_IN msgrequest */
|
||||
#define MC_CMD_GET_LICENSED_APP_STATE_IN_LEN 4
|
||||
/* application ID to query (LICENSED_APP_ID_xxx) */
|
||||
#define MC_CMD_GET_LICENSED_APP_STATE_IN_APP_ID_OFST 0
|
||||
|
||||
/* MC_CMD_GET_LICENSED_APP_STATE_OUT msgresponse */
|
||||
#define MC_CMD_GET_LICENSED_APP_STATE_OUT_LEN 4
|
||||
/* state of this application */
|
||||
#define MC_CMD_GET_LICENSED_APP_STATE_OUT_STATE_OFST 0
|
||||
/* enum: no (or invalid) license is present for the application */
|
||||
#define MC_CMD_GET_LICENSED_APP_STATE_OUT_NOT_LICENSED 0x0
|
||||
/* enum: a valid license is present for the application */
|
||||
#define MC_CMD_GET_LICENSED_APP_STATE_OUT_LICENSED 0x1
|
||||
|
||||
|
||||
/***********************************/
|
||||
/* MC_CMD_LICENSED_APP_OP
|
||||
* Perform an action for an individual licensed application.
|
||||
*/
|
||||
#define MC_CMD_LICENSED_APP_OP 0xf6
|
||||
|
||||
/* MC_CMD_LICENSED_APP_OP_IN msgrequest */
|
||||
#define MC_CMD_LICENSED_APP_OP_IN_LENMIN 8
|
||||
#define MC_CMD_LICENSED_APP_OP_IN_LENMAX 252
|
||||
#define MC_CMD_LICENSED_APP_OP_IN_LEN(num) (8+4*(num))
|
||||
/* application ID */
|
||||
#define MC_CMD_LICENSED_APP_OP_IN_APP_ID_OFST 0
|
||||
/* the type of operation requested */
|
||||
#define MC_CMD_LICENSED_APP_OP_IN_OP_OFST 4
|
||||
/* enum: validate application */
|
||||
#define MC_CMD_LICENSED_APP_OP_IN_OP_VALIDATE 0x0
|
||||
/* arguments specific to this particular operation */
|
||||
#define MC_CMD_LICENSED_APP_OP_IN_ARGS_OFST 8
|
||||
#define MC_CMD_LICENSED_APP_OP_IN_ARGS_LEN 4
|
||||
#define MC_CMD_LICENSED_APP_OP_IN_ARGS_MINNUM 0
|
||||
#define MC_CMD_LICENSED_APP_OP_IN_ARGS_MAXNUM 61
|
||||
|
||||
/* MC_CMD_LICENSED_APP_OP_OUT msgresponse */
|
||||
#define MC_CMD_LICENSED_APP_OP_OUT_LENMIN 0
|
||||
#define MC_CMD_LICENSED_APP_OP_OUT_LENMAX 252
|
||||
#define MC_CMD_LICENSED_APP_OP_OUT_LEN(num) (0+4*(num))
|
||||
/* result specific to this particular operation */
|
||||
#define MC_CMD_LICENSED_APP_OP_OUT_RESULT_OFST 0
|
||||
#define MC_CMD_LICENSED_APP_OP_OUT_RESULT_LEN 4
|
||||
#define MC_CMD_LICENSED_APP_OP_OUT_RESULT_MINNUM 0
|
||||
#define MC_CMD_LICENSED_APP_OP_OUT_RESULT_MAXNUM 63
|
||||
|
||||
/* MC_CMD_LICENSED_APP_OP_VALIDATE_IN msgrequest */
|
||||
#define MC_CMD_LICENSED_APP_OP_VALIDATE_IN_LEN 72
|
||||
/* application ID */
|
||||
#define MC_CMD_LICENSED_APP_OP_VALIDATE_IN_APP_ID_OFST 0
|
||||
/* the type of operation requested */
|
||||
#define MC_CMD_LICENSED_APP_OP_VALIDATE_IN_OP_OFST 4
|
||||
/* validation challenge */
|
||||
#define MC_CMD_LICENSED_APP_OP_VALIDATE_IN_CHALLENGE_OFST 8
|
||||
#define MC_CMD_LICENSED_APP_OP_VALIDATE_IN_CHALLENGE_LEN 64
|
||||
|
||||
/* MC_CMD_LICENSED_APP_OP_VALIDATE_OUT msgresponse */
|
||||
#define MC_CMD_LICENSED_APP_OP_VALIDATE_OUT_LEN 68
|
||||
/* feature expiry (time_t) */
|
||||
#define MC_CMD_LICENSED_APP_OP_VALIDATE_OUT_EXPIRY_OFST 0
|
||||
/* validation response */
|
||||
#define MC_CMD_LICENSED_APP_OP_VALIDATE_OUT_RESPONSE_OFST 4
|
||||
#define MC_CMD_LICENSED_APP_OP_VALIDATE_OUT_RESPONSE_LEN 64
|
||||
|
||||
|
||||
/***********************************/
|
||||
/* MC_CMD_SET_PORT_SNIFF_CONFIG
|
||||
* Configure port sniffing for the physical port associated with the calling
|
||||
* function. Only a privileged function may change the port sniffing
|
||||
* configuration. A copy of all traffic delivered to the host (non-promiscuous
|
||||
* mode) or all traffic arriving at the port (promiscuous mode) may be
|
||||
* delivered to a specific queue, or a set of queues with RSS.
|
||||
*/
|
||||
#define MC_CMD_SET_PORT_SNIFF_CONFIG 0xf7
|
||||
|
||||
/* MC_CMD_SET_PORT_SNIFF_CONFIG_IN msgrequest */
|
||||
#define MC_CMD_SET_PORT_SNIFF_CONFIG_IN_LEN 16
|
||||
/* configuration flags */
|
||||
#define MC_CMD_SET_PORT_SNIFF_CONFIG_IN_FLAGS_OFST 0
|
||||
#define MC_CMD_SET_PORT_SNIFF_CONFIG_IN_ENABLE_LBN 0
|
||||
#define MC_CMD_SET_PORT_SNIFF_CONFIG_IN_ENABLE_WIDTH 1
|
||||
#define MC_CMD_SET_PORT_SNIFF_CONFIG_IN_PROMISCUOUS_LBN 1
|
||||
#define MC_CMD_SET_PORT_SNIFF_CONFIG_IN_PROMISCUOUS_WIDTH 1
|
||||
/* receive queue handle (for RSS mode, this is the base queue) */
|
||||
#define MC_CMD_SET_PORT_SNIFF_CONFIG_IN_RX_QUEUE_OFST 4
|
||||
/* receive mode */
|
||||
#define MC_CMD_SET_PORT_SNIFF_CONFIG_IN_RX_MODE_OFST 8
|
||||
/* enum: receive to just the specified queue */
|
||||
#define MC_CMD_SET_PORT_SNIFF_CONFIG_IN_RX_MODE_SIMPLE 0x0
|
||||
/* enum: receive to multiple queues using RSS context */
|
||||
#define MC_CMD_SET_PORT_SNIFF_CONFIG_IN_RX_MODE_RSS 0x1
|
||||
/* RSS context (for RX_MODE_RSS) as returned by MC_CMD_RSS_CONTEXT_ALLOC. Note
|
||||
* that these handles should be considered opaque to the host, although a value
|
||||
* of 0xFFFFFFFF is guaranteed never to be a valid handle.
|
||||
*/
|
||||
#define MC_CMD_SET_PORT_SNIFF_CONFIG_IN_RX_CONTEXT_OFST 12
|
||||
|
||||
/* MC_CMD_SET_PORT_SNIFF_CONFIG_OUT msgresponse */
|
||||
#define MC_CMD_SET_PORT_SNIFF_CONFIG_OUT_LEN 0
|
||||
|
||||
|
||||
/***********************************/
|
||||
/* MC_CMD_GET_PORT_SNIFF_CONFIG
|
||||
* Obtain the current port sniffing configuration for the physical port
|
||||
* associated with the calling function. Only a privileged function may read
|
||||
* the configuration.
|
||||
*/
|
||||
#define MC_CMD_GET_PORT_SNIFF_CONFIG 0xf8
|
||||
|
||||
/* MC_CMD_GET_PORT_SNIFF_CONFIG_IN msgrequest */
|
||||
#define MC_CMD_GET_PORT_SNIFF_CONFIG_IN_LEN 0
|
||||
|
||||
/* MC_CMD_GET_PORT_SNIFF_CONFIG_OUT msgresponse */
|
||||
#define MC_CMD_GET_PORT_SNIFF_CONFIG_OUT_LEN 16
|
||||
/* configuration flags */
|
||||
#define MC_CMD_GET_PORT_SNIFF_CONFIG_OUT_FLAGS_OFST 0
|
||||
#define MC_CMD_GET_PORT_SNIFF_CONFIG_OUT_ENABLE_LBN 0
|
||||
#define MC_CMD_GET_PORT_SNIFF_CONFIG_OUT_ENABLE_WIDTH 1
|
||||
#define MC_CMD_GET_PORT_SNIFF_CONFIG_OUT_PROMISCUOUS_LBN 1
|
||||
#define MC_CMD_GET_PORT_SNIFF_CONFIG_OUT_PROMISCUOUS_WIDTH 1
|
||||
/* receiving queue handle (for RSS mode, this is the base queue) */
|
||||
#define MC_CMD_GET_PORT_SNIFF_CONFIG_OUT_RX_QUEUE_OFST 4
|
||||
/* receive mode */
|
||||
#define MC_CMD_GET_PORT_SNIFF_CONFIG_OUT_RX_MODE_OFST 8
|
||||
/* enum: receiving to just the specified queue */
|
||||
#define MC_CMD_GET_PORT_SNIFF_CONFIG_OUT_RX_MODE_SIMPLE 0x0
|
||||
/* enum: receiving to multiple queues using RSS context */
|
||||
#define MC_CMD_GET_PORT_SNIFF_CONFIG_OUT_RX_MODE_RSS 0x1
|
||||
/* RSS context (for RX_MODE_RSS) */
|
||||
#define MC_CMD_GET_PORT_SNIFF_CONFIG_OUT_RX_CONTEXT_OFST 12
|
||||
|
||||
|
||||
#endif /* MCDI_PCOL_H */
|
||||
|
||||
Loading…
Reference in New Issue
Block a user