riscv: Pass patch_text() the length in bytes
patch_text_nosync() already handles an arbitrary length of code, so this removes a superfluous loop and reduces the number of icache flushes. Reviewed-by: Björn Töpel <bjorn@rivosinc.com> Signed-off-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20240327160520.791322-6-samuel.holland@sifive.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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@ -9,7 +9,7 @@
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int patch_insn_write(void *addr, const void *insn, size_t len);
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int patch_text_nosync(void *addr, const void *insns, size_t len);
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int patch_text_set_nosync(void *addr, u8 c, size_t len);
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int patch_text(void *addr, u32 *insns, int ninsns);
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int patch_text(void *addr, u32 *insns, size_t len);
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extern int riscv_patch_in_stop_machine;
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@ -19,7 +19,7 @@
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struct patch_insn {
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void *addr;
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u32 *insns;
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int ninsns;
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size_t len;
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atomic_t cpu_count;
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};
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@ -239,14 +239,10 @@ NOKPROBE_SYMBOL(patch_text_nosync);
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static int patch_text_cb(void *data)
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{
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struct patch_insn *patch = data;
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unsigned long len;
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int i, ret = 0;
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int ret = 0;
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if (atomic_inc_return(&patch->cpu_count) == num_online_cpus()) {
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for (i = 0; ret == 0 && i < patch->ninsns; i++) {
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len = GET_INSN_LENGTH(patch->insns[i]);
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ret = patch_insn_write(patch->addr + i * len, &patch->insns[i], len);
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}
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ret = patch_insn_write(patch->addr, patch->insns, patch->len);
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/*
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* Make sure the patching store is effective *before* we
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* increment the counter which releases all waiting CPUs
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@ -266,13 +262,13 @@ static int patch_text_cb(void *data)
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}
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NOKPROBE_SYMBOL(patch_text_cb);
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int patch_text(void *addr, u32 *insns, int ninsns)
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int patch_text(void *addr, u32 *insns, size_t len)
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{
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int ret;
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struct patch_insn patch = {
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.addr = addr,
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.insns = insns,
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.ninsns = ninsns,
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.len = len,
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.cpu_count = ATOMIC_INIT(0),
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};
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@ -24,13 +24,13 @@ post_kprobe_handler(struct kprobe *, struct kprobe_ctlblk *, struct pt_regs *);
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static void __kprobes arch_prepare_ss_slot(struct kprobe *p)
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{
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size_t len = GET_INSN_LENGTH(p->opcode);
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u32 insn = __BUG_INSN_32;
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unsigned long offset = GET_INSN_LENGTH(p->opcode);
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p->ainsn.api.restore = (unsigned long)p->addr + offset;
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p->ainsn.api.restore = (unsigned long)p->addr + len;
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patch_text_nosync(p->ainsn.api.insn, &p->opcode, 1);
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patch_text_nosync(p->ainsn.api.insn + offset, &insn, 1);
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patch_text_nosync(p->ainsn.api.insn, &p->opcode, len);
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patch_text_nosync(p->ainsn.api.insn + len, &insn, GET_INSN_LENGTH(insn));
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}
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static void __kprobes arch_prepare_simulate(struct kprobe *p)
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@ -107,16 +107,18 @@ int __kprobes arch_prepare_kprobe(struct kprobe *p)
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/* install breakpoint in text */
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void __kprobes arch_arm_kprobe(struct kprobe *p)
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{
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u32 insn = (p->opcode & __INSN_LENGTH_MASK) == __INSN_LENGTH_32 ?
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__BUG_INSN_32 : __BUG_INSN_16;
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size_t len = GET_INSN_LENGTH(p->opcode);
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u32 insn = len == 4 ? __BUG_INSN_32 : __BUG_INSN_16;
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patch_text(p->addr, &insn, 1);
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patch_text(p->addr, &insn, len);
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}
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/* remove breakpoint from text */
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void __kprobes arch_disarm_kprobe(struct kprobe *p)
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{
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patch_text(p->addr, &p->opcode, 1);
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size_t len = GET_INSN_LENGTH(p->opcode);
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patch_text(p->addr, &p->opcode, len);
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}
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void __kprobes arch_remove_kprobe(struct kprobe *p)
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@ -16,6 +16,7 @@
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#include "bpf_jit.h"
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#define RV_FENTRY_NINSNS 2
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#define RV_FENTRY_NBYTES (RV_FENTRY_NINSNS * 4)
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#define RV_REG_TCC RV_REG_A6
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#define RV_REG_TCC_SAVED RV_REG_S6 /* Store A6 in S6 if program do calls */
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@ -672,7 +673,7 @@ int bpf_arch_text_poke(void *ip, enum bpf_text_poke_type poke_type,
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if (ret)
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return ret;
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if (memcmp(ip, old_insns, RV_FENTRY_NINSNS * 4))
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if (memcmp(ip, old_insns, RV_FENTRY_NBYTES))
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return -EFAULT;
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ret = gen_jump_or_nops(new_addr, ip, new_insns, is_call);
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@ -681,8 +682,8 @@ int bpf_arch_text_poke(void *ip, enum bpf_text_poke_type poke_type,
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cpus_read_lock();
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mutex_lock(&text_mutex);
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if (memcmp(ip, new_insns, RV_FENTRY_NINSNS * 4))
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ret = patch_text(ip, new_insns, RV_FENTRY_NINSNS);
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if (memcmp(ip, new_insns, RV_FENTRY_NBYTES))
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ret = patch_text(ip, new_insns, RV_FENTRY_NBYTES);
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mutex_unlock(&text_mutex);
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cpus_read_unlock();
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