mmc: meson-gx: clean up some constants
Remove unused clock rate defines. These should not be defined but requested from the clock framework. Also correct typo on the DELAY register Reviewed-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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@ -45,9 +45,7 @@
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#define CLK_DIV_MAX 63
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#define CLK_SRC_MASK GENMASK(7, 6)
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#define CLK_SRC_XTAL 0 /* external crystal */
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#define CLK_SRC_XTAL_RATE 24000000
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#define CLK_SRC_PLL 1 /* FCLK_DIV2 */
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#define CLK_SRC_PLL_RATE 1000000000
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#define CLK_CORE_PHASE_MASK GENMASK(9, 8)
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#define CLK_TX_PHASE_MASK GENMASK(11, 10)
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#define CLK_RX_PHASE_MASK GENMASK(13, 12)
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@ -57,7 +55,7 @@
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#define CLK_PHASE_270 3
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#define CLK_ALWAYS_ON BIT(24)
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#define SD_EMMC_DElAY 0x4
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#define SD_EMMC_DELAY 0x4
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#define SD_EMMC_ADJUST 0x8
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#define SD_EMMC_CALOUT 0x10
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#define SD_EMMC_START 0x40
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