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This pull request contains Broadcom ARM64-based SoCs Device Tree fixes

Browse Source 
for 5.19, please pull the following:
 
 - William corrects the BCM4906 DTS to have an armv8-timer Device Tree,
   necessary for booting, and fixes the BCM4908 DTS to have a proper
   'enable-method' and 'cpu-release-addr' properties for the kernel to boot
   when using u-boot
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Merge tag 'arm-soc/for-5.19/devicetree-arm64-fixes' of https://github.com/Broadcom/stblinux into arm/fixes

This pull request contains Broadcom ARM64-based SoCs Device Tree fixes
for 5.19, please pull the following:

- William corrects the BCM4906 DTS to have an armv8-timer Device Tree,
  necessary for booting, and fixes the BCM4908 DTS to have a proper
  'enable-method' and 'cpu-release-addr' properties for the kernel to boot
  when using u-boot

* tag 'arm-soc/for-5.19/devicetree-arm64-fixes' of https://github.com/Broadcom/stblinux:
  arm64: dts: broadcom: bcm4908: Fix cpu node for smp boot
  arm64: dts: broadcom: bcm4908: Fix timer node for BCM4906 SoC

Link: https://lore.kernel.org/r/20220712231222.97850-1-f.fainelli@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2022-07-13 09:35:55 +02:00
commit 52905140c3
2 changed files with 10 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
arch/arm64/boot/dts/broadcom/bcm4908/bcm4906.dtsi
View File

@ -9,6 +9,14 @@
/delete-node/ cpu@3;
};
timer {
compatible = "arm,armv8-timer";
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
};
pmu {
compatible = "arm,cortex-a53-pmu";
interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,

2
arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
View File

@ -29,6 +29,8 @@
device_type = "cpu";
compatible = "brcm,brahma-b53";
reg = <0x0>;
enable-method = "spin-table";
cpu-release-addr = <0x0 0xfff8>;
next-level-cache = <&l2>;
};